Hybrid GCC Compiler Engineer for AI‑RISC‑V Platforms

Tenstorrent; Santa Clara, Austin (CA, TX); Hybrid; CAD 138,000 - 691,000; Full time

Benefits offered by this job

Competitive compensation

Equal opportunity employer

Hybrid work model

Job summary

Tenstorrent is seeking a GCC Compiler Engineer to design, develop, and optimize compilers for our custom RISC‑V and AI vector engines. This hands‑on role collaborates across hardware and software teams to improve performance and programmability.

You will work on GCC/LLVM integration, profiling, and optimization across diverse workloads, including ML frameworks. The role offers a hybrid arrangement in Toronto, Santa Clara, or Austin with competitive compensation.

Qualifications

• Experienced GCC/LLVM compiler engineer with deep target knowledge.
• Strong C/C++ developer with algorithms and performance analysis skills.
• Collaborative and analytical across hardware/software domains.
• Passion for enabling breakthrough compute architectures via compiler innovation.

Responsibilities

• Design, develop, and optimize GCC and/or LLVM compilers for Tenstorrent's RISC‑V hardware and AI vector engines.
• Benchmark, analyze, and tune performance of core applications across RISC‑V and AI software environments.
• Collaborate with ML engineers to implement compiler support for emerging AI workloads and frameworks.
• Co‑design hardware/software stack to maximize performance and programmability.

Skills

C/C++ development

Performance analysis

Cross-team collaboration

Tools

GCC

LLVM

Performance profiling tools

Job description

Tenstorrent is seeking a GCC Compiler Engineer to design, develop, and optimize compilers for our custom RISC‑V and AI vector engines. This hands‑on role collaborates across hardware and software teams to improve performance and programmability.

You will work on GCC/LLVM integration, profiling, and optimization across diverse workloads, including ML frameworks. The role offers a hybrid arrangement in Toronto, Santa Clara, or Austin with competitive compensation.