HBM Design Architect — End-to-End Test & 3D Memory

Micron Technology, Inc.; Richardson (TX); On-site; USD 146,000 - 297,000; Full time

Job summary

Micron Technology, Inc. is seeking an HBM Design Architect to define how next‑generation HBM products are tested from wafer to system. You will influence product quality, yield, and performance through close collaboration with design, test, and manufacturing teams.

The role requires a strong background in scan, MBIST, JTAG and boundary scan, plus 5+ years in DRAM or ASIC DFT design or verification, and experience with wafer probe and final test.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• Strong knowledge of scan, MBIST, JTAG, and boundary scan concepts.
• Experience with wafer probe and final test semiconductor flows.
• 5+ years of experience in DRAM or ASIC DFT design or verification.

Responsibilities

• Define and implement end-to-end DFT architectures for HBM base die and DRAM die
• Develop DFT strategies for stacked-die, cube-level, and system-level test flows
• Architect test access mechanisms supporting wafer probe through final test
• Enable silicon observability for yield learning, debug, and failure analysis
• Collaborate across design, verification, layout, test, and manufacturing teams

Skills

Scan/MBIST/JTAG/boundary scan

DFT design/verification experience

Wafer probe and final test flows

HBM/DRAM knowledge

TSV 3D integration

At-speed test/advanced DFT techniques

DFT security features exposure

Education

Bachelor’s or Master’s degree in Electrical/Computer Engineering or related

Job description

Micron Technology, Inc. is seeking an HBM Design Architect to define how next‑generation HBM products are tested from wafer to system. You will influence product quality, yield, and performance through close collaboration with design, test, and manufacturing teams.

The role requires a strong background in scan, MBIST, JTAG and boundary scan, plus 5+ years in DRAM or ASIC DFT design or verification, and experience with wafer probe and final test.