Hardware Design Integrity Engineer

Arista Networks; Santa Clara (CA); On-site; USD 130,000 - 225,000; Full time

Job summary

Arista Networks is seeking a Hardware Engineer to join the team responsible for developing high-speed networking products for enterprise campuses, hyperscale data centers, and AI clusters.

You will diagnose production issues, deliver robust fixes, and work with cross-functional teams to ensure system reliability.

Qualifications

• BSEE or MSEE required.
• 5+ years hardware engineering experience.
• Experience debugging Networking Hardware.
• Experience with 50G+ boards and high-speed interfaces (DDR, PCIe).
• Familiarity with signal integrity and power integrity concepts and tools.

Responsibilities

• Deep dive into hardware design aspects (CPU/ASIC, power, SI, clocking, PCIe, optics).
• Collaborate with software and customer teams on escalations, reading logs, and root-cause analysis.
• Write and present root cause analyses to executives and customers.
• Develop tests and identify test escapes with validation teams.
• Provide fixes to designs and firmware as needed.

Skills

Hardware debugging

Networking hardware

Verilog

Education

BSEE

MSEE

Tools

PCIe analysis tools

Bode plots

TDRs

VNA”

Job description

Company Description
Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges.
At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation.
Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do.
Job Description
Who You’ll Work With
Working closely with cross-functional teams including software, product management, and manufacturing, our engineers innovate on system architectures, high-speed PCB designs, and signal integrity to deliver state-of-the-art products that drive network performance and reliability.
What You'll Do
Our Hardware Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscaler datacenters and bleeding edge AI clusters. With this comes complex, oftentimes cross-platform issues requiring engineers passionate about debugging and delivering root cause analysis and fixes to the design team, executives, and customers.
Candidates for this position would be responsible for debugging production system problems and delivering solutions.

• Deep dive into various aspects of any existing hardware design - CPU/ASIC, power, SI, clocking, PCIE, optics, fab, components.
• Work closely with sw & customer teams on high pressure escalations from the field, including reading logs, identifying the bug, determining the best fix with minimal interruption to the field, delivering the final solution, determining if any other systems are susceptible, and implementing measures to prevent the issue from occurring again.
• Writing scripts to look for specific information in the logs or to capture information in live debug sessions
• Work closely with the hw design team, but also be able to make firmware, schematic, BOM, fab changes as needed.
• Lab measurements and debug.
• Work closely with component, FA, ODM teams to identify component level or third party RCAs and fixes needed.
• Identify test escapes. Work with the design validation team to examine current test limitations and develop new tests.
• Write and present root cause analysis for executives and customers.
  

Qualifications

• BSEE or MSEE
• 5+ years of relevant experience in hardware engineering
• Experience debugging Networking Hardware
• Experience with proper design of 20+ layer count boards featuring 50G+ signals
• Experience debugging and validating multi-phase DC/DC’s for high current, high transient loads
• Experience with design and debug of high speed interfaces (DDR, PCIe) as well as low speed signals (I2C, SPI)
• Familiarity with signal integrity and power integrity concepts and tools, such as: impedance, PDN’s, Bode plots, PCIE analyzers, TDR’s, VNA’s
• FPGA design using Verilog
  

Compensation Information
The new hire base pay for this role has a salary range of $130,000 to $225,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The pay range provided reflects base pay only and in addition certain roles may also be eligible for discretionary Arista bonuses and equity. Employees in Sales roles are eligible to participate in Arista’s Sales Incentive Plan, which pays commissions calculated as a percentage of eligible sales. US-based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location.
Additional Information
Arista Networks is an equal opportunity employer. Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law. All your information will be kept confidential according to EEO guidelines.