GPU Validation Engineer — Build High-Performance Graphics

Intel Corporation; Folsom (CA); Hybrid; USD 122,000 - 232,000; Full time

Benefits offered by this job

Health insurance

Stock bonuses

Retirement plans

Job summary

Intel Corporation in Folsom, CA, is seeking a GPU Validation Engineer to define validation methodologies and build emulation/prototyping models. You will debug silicon, maintain validation infra, and drive performance, power, and area goals across media and display interactions.

You will collaborate with architecture, design, board and manufacturing teams to optimize validation and publish reports detailing results to cross-functional groups.

Qualifications

• Bachelor's or Master’s degree in Electrical/Computer Engineering or related field.
• 4+ years in pre-silicon validation techniques, tools, and debugging.
• 4+ years coding in C, C++, Python, and scripting for automation.
• 4+ years of knowledge in computer architecture and microarchitecture fundamentals.
• 4+ years’ experience with emulation (ZeBu/Palladium).

Responsibilities

• Define validation methodologies for GPUs focusing on media, display, and system interactions.
• Build and test emulation and prototyping models for GPU.
• Perform silicon debug to identify root causes and resolve GPU issues.
• Develop and maintain post-silicon validation infrastructure and tests.
• Conduct validation testing to meet performance, power, and area goals.
• Review design changes for impact on validation plans and timelines.
• Test interactions between GPU features using validation tools.
• Collaborate with architecture, design, and manufacturing teams to optimize validation.
• Publish comprehensive GPU validation reports and communicate findings.

Skills

Pre-silicon validation

C/C++/Python

Computer architecture

Emulation tooling

Education

Bachelor's/Master's in Electrical or Computer Engineering

Tools

ZeBu

Palladium

Job description

Intel Corporation in Folsom, CA, is seeking a GPU Validation Engineer to define validation methodologies and build emulation/prototyping models. You will debug silicon, maintain validation infra, and drive performance, power, and area goals across media and display interactions.

You will collaborate with architecture, design, board and manufacturing teams to optimize validation and publish reports detailing results to cross-functional groups.