GPU Performance Engineer & CUDA Kernel Architect

Liquid AI; San Francisco (CA); Presencial; USD 180.000 - 240.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Equity

Medical/Dental/Vision

401(k) match

Unlimited PTO

Refill Days

Descripción de la vacante

Liquid AI is seeking a hands-on GPU performance engineer to design, implement, and optimize high‑performance GPU kernels for our novel model architectures. You will profile training and inference workloads, identify bottlenecks, and apply memory and compute optimizations to boost latency and throughput.

Collaborating with researchers and engineers, you’ll translate architectural ideas into efficient, production-grade implementations, with a focus on thread configuration, tensor cores, and

Formación

• Hands-on experience developing and optimizing custom GPU kernels using CUDA or Triton.
• Deep understanding of GPU architecture, memory hierarchy, and warp execution.
• Ability to profile, benchmark, and debug GPU workloads with modern tools.
• Strong C++ programming skills and performance-sensitive coding.
• Experience integrating kernels into ML frameworks is a plus.

Responsabilidades

• Design, implement, and optimize high‑performance GPU kernels for model architectures.
• Profile workloads to identify bottlenecks and optimize latency and throughput.
• Tune memory patterns, thread/block configurations, and tensor core utilization.
• Integrate custom kernels with PyTorch pipelines and custom operators.
• Collaborate with researchers and engineers to translate research into production KPIs.
• Build and maintain benchmarking and regression checks.

Conocimientos

GPU kernel

CUDA

Profiling

C++

Performance tuning

Educación

B.S. in Computer Science or related

Herramientas

Nsight Systems

Nsight Compute

PyTorch

CUTLASS

Descripción del empleo

Liquid AI is seeking a hands-on GPU performance engineer to design, implement, and optimize high‑performance GPU kernels for our novel model architectures. You will profile training and inference workloads, identify bottlenecks, and apply memory and compute optimizations to boost latency and throughput.

Collaborating with researchers and engineers, you’ll translate architectural ideas into efficient, production-grade implementations, with a focus on thread configuration, tensor cores, and