Functional Safety Architect

Altera; San Jose (CA); On-site; USD 149,100 - 215,000; Full time

Job summary

Altera is seeking a Functional Safety Architect to lead safety activities across semiconductor and IP development for avionics, space, defense, automotive and industrial markets. You will own device safety architecture and drive concepts and allocate safety requirements to IP blocks.

Collaborate with RTL, design, firmware and verification teams to deliver safety collateral and achieve certifications; ensure compliance with IEC 61508, ISO 26262; drive safety case evidences and safety lifecycle

Qualifications

• Bachelor's or Master's in Electrical Engineering or related field, with 10+ years silicon industry experience.
• 7+ years safety professional experience with certifications (e.g., FSCP, FS Professional).
• 7+ years certifying devices for ASICs/PLDs/CPUs with EXIDA, TÜV or equivalent.
• 7+ years experience with SysML, FMEA/FMEDA, FTA, HAZOP and requirements-management tooling (Jama).

Responsibilities

• Architect new safety concepts and mechanism features across projects.
• Perform safety analyses (FTA, FMEA, DFA) to meet fault tolerance requirements.
• Define safety architecture techniques (lockstep CPUs, ECC memories, watchdogs).
• Review safety requirement specifications with FSEs.
• Guide ASIL/SIL decomposition and diagnostics coverage.
• Review safety designs for compliance and feasibility.
• Define safety V&V strategy and use fault injection/simulation/test methods.
• Ensure diagnostic coverage metrics (SPFM, LFM, PMHF).
• Document safety cases aligned with IEC 61508 and ISO 26262.
• Perform safety manager duties on selected projects.

Skills

Safety analyses

ASIL/SIL

System architecture

V&V planning

Stakeholder communication

Safety certifications

Education

Electrical Engineering degree

Tools

SysML

Jama

Fault injection tools

Job description

About Altera

At Altera™, our independence as the world's largest pure play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry - leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely-empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

Altera is seeking a Functional Safety Architect to lead and oversee the functional safety activities across various semiconductor and IP development projects for Avionics, Space, Defense, Automotive, and Industrial market segment. In this role, you will own the device safety architecture and lead the efforts to achieve safety goals by developing technical safety concepts including safety mechanisms derived from safety analyses; and allocating decomposed safety requirements to each IP sub-blocks for next-generation semiconductor devices.

You will collaborate with architects, IP owners, RTL design engineers, physical design, firmware and verification teams to deliver critical safety collaterals ensuring end goal of achieving successful functional safety certification.

Additional responsibilities may include ensuring process and product compliance with ISO 26262, IEC 61508, and other relevant safety standards such as DO-254/DO-178, collaborating with internal teams and external stakeholders to demonstrate systematic capability throughout the safety lifecycle. As a technical leader, you will drive engineering teams toward the successful delivery of safety rated devices and IPs for our customers.

Key Responsibilities

• Collaborate with the Architects, Silicon Design, Software teams to architect new safety concepts and safety mechanism features and guide future development.
• Perform safety analyses (FTA, FMEA, DFA methodologies) against CCF, CF to ensure FFI, independence & fault tolerance requirements are met.
• Define safety architecture techniques (lockstep CPUs, ECC memories, watchdogs, redundancy).
• Review and contribute to writing safety requirement specifications with FSEs.
• Guide teams on ASIL/SIL decomposition, fault tolerance, diagnostics coverage, etc.
• Review hardware/software safety designs for compliance and feasibility.
• Collaborate with design verification teams to define safety V&V strategy (fault injection, fault simulation, test methodologies).
• Ensure achievement of diagnostic coverage metrics (SPFM, LFM, PMHF).
• Document and present defensible safety case evidences aligned with IEC 61508, ISO 26262 ensuring clarity and traceability for stakeholders and assessors.
• Perform safety manager role on certain projects to meet management of functional safety per the standard.
• Support process related activities in achieving systematic capability (SIL3/ASIL D).

Soft Skills Needed

• Demonstrated strong ability to move seamlessly between levels of abstraction - from system to the \"nuts and bolts\" implementation.
• Excellent written & oral communication skills to construct clear, evidence-based safety arguments and build trust in safety cases with both internal and external stakeholders.

Salary Range

$149,100 - $215,000 USD (Bay Area, California only). Actual salary may vary based on location, job-related knowledge, skills, experience, and training. Incentive opportunities based on individual and company performance may also be offered.

Minimum Qualifications

• Bachelor's or Master's degree in Electrical Engineering or related field + 10 years silicon industry experience, or Master's + 8 years of silicon industry experience.
• 7+ years of safety professional experience, including possessing certifications (e.g., FSCP, FS Professional license).
• 7+ years of experience in certifying devices from concept through certification for ASICs/PLDs/CPUs with EXIDA, TUeV or Equivalent.
• 7+ years of experience with SysML, FMEA/FMEDA, FTA, HAZOP and requirements-management tooling (e.g., Jama).

Preferred Qualifications

• Familiarity with RTL coding and simulations/debug of SoC Architectures.
• Desire to develop deep understanding of end user needs and engagement with customers to enable use of SoCs in safety design applications.
• Desire to commit and follow through on complex, multi-year programs.
• Ability to resolve complex issues in creative, efficient, and effective ways.
• Hands-on experience with creating safety documents (Safety Cases, Safety Management Plans).

Legal Notice

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.