FPGA Engineer

Bolt Graphics; United States; Remote; USD 150,000 - 220,000; Full time

Benefits offered by this job

Medical, Dental & Vision coverage

Stock options

401(k) match

WFH hardware

Job summary

Bolt is seeking a highly skilled FPGA Engineer fluent in SystemVerilog to design and optimize complex FPGA systems on Xilinx platforms. You will develop RTL, write testbenches, and collaborate across time zones to deliver robust hardware solutions.

Experience with Vivado, ILA-based debugging, GTY/GTM, AXI interfaces, and QSFP+ fiber signaling is highly desirable. This role is based in California with strong compensation and equity.

Qualifications

• BS or MS in Computer/Electrical Engineering or equivalent.
• Proficient in SystemVerilog and C/C++.
• Experience with Xilinx Versal and Alveo platforms.
• Experience with QSFP+ fiber signaling and encoding.
• Waveform analysis for debugging and optimization.
• Experience with GTY/GTM.
• Experience with AXI interfaces.
• Timing constraints and fixing violations.
• Create testbenches to verify RTL.
• Advanced debugging and signal analysis via ILA.
• Read technical documents and design hardware to standards.
• Startup experience.

Responsibilities

• Develop and design FPGA systems using SystemVerilog
• Debug / Troubleshoot issues in the design
• Utilize Xilinx Vivado for FPGA development
• Set up and analyze signals using ILA for debugging purposes
• Document RTL using standard practices
• Communicate with team members across different time zones

Skills

SystemVerilog

C/C++

Education

Bachelor's or Master’s in Computer/Electrical Engineering

Tools

Xilinx Vivado

ILA

AXI protocol

Job description

About the role:

Weareseekinga highly skilled FPGA Engineer who is fluent in System Verilog and is an expert user ofXilinx (acquired by AMD)FPGAs.

What you’ll do:

• Develop and design FPGA systems using System Verilog
• Debug / Troubleshoot issues in the design
• Utilize XilinxVivadofor FPGA development
• Set up and analyze signals using ILA for debugging purposes
• Document RTL using standard practices
• Communicate with team members across different time zones

Qualifications:

• Bachelors, Masters in Computer Engineering, Electrical Engineering,or equivalent.
• Programming:System Verilog, C/C++
• Experience with the Xilinx Versal platform
• Experience with the Xilinx Alveo platform
• Experience with QSFP+ fiber communication and encoding strategies
• Experience with waveform analysis for debugging and optimization
• Experience with GTY/GTM
• Experience with using and creating custom interfaces usingAXI protocol
• Experience with fixing timing violations through constraints and logic critical path analysis
• Ability to create testbenches to verify functionality of RTL
• Advanced debugging features and signal analysis via ILA.
• Ability to read technical documents/standards and design hardware to follow those standards
• Startup experience

Compensation Range:

$150,000–$220,000 per year (California). This range represents the anticipated base pay for this role; the final offer may vary based on qualifications, experience, and location.

Benefits:

• Medical, Dental, & Vision - 100% covered premiums
• Equity - Stock Options
• 401(k) match
• WFH Hardware

Bolt is committed to building a diverse and inclusive environment in which we recognize and value each other’s differences as well as fostering a culture that promotes its core values: Professionalism, Integrity, and Respect. As an equal opportunity employer, all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, age, disability, or status as a protected veteran.