FPGA Digital Design Engineer (6+ month Contract)

OpenKrill; United States; Remote; USD 120,000 - 170,000; Full time

Benefits offered by this job

Equity plan

Health, dental & vision insurance

Unlimited vacation

Parental leave

Company-wide holidays

Relocation packages

Professional development fund

Toronto office kitchen

Town halls & events

Great Place to Work certification

Job summary

Kepler Communications in the United States is seeking a senior FPGA/RTL engineer to develop custom IP for our satellite digital payloads and help shape real-time on-orbit connectivity.

You will work with DSP designs, interface architectures, and vendors to extend capabilities of our next-generation constellation, with opportunities for growth and impact across global missions.

This role offers competitive compensation, relocation support, and an equity plan as part of our culture of innovation.

Qualifications

• Degree in computer or electrical engineering with embedded systems focus.
• 5+ years FPGA/RTL design experience in real-time systems.
• Proficiency in Verilog or SystemVerilog; willing to adapt to SystemVerilog.
• Experience with Xilinx toolchain and FPGA fabrics.

Responsibilities

• Develop custom IP for new features of satellite payloads.
• Iterate DSP/interface designs to improve reliability.
• Collaborate with IP core vendors to integrate functionality.
• Contribute to communications and network architecture for the constellation.
• Assist in conceptual design studies for new spacecraft.

Skills

FPGA/RTL design

Verilog/SystemVerilog

Xilinx Zynq/Versal

HDL timing/synchronization

Python scripting

Education

Bachelor’s Degree in Computer or Electrical Engineering

Tools

Vivado

Quartus

ModelSim

Job description

At Kepler Communications, we're not just imagining the future of on-demand space connectivity - we're leading it!

Our mission is to provide real-time on-orbit connectivity for critical missions, enabling a new era of data-driven intelligence and innovation. With 33 satellites launched to date, Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities.

Industry-leading technology is only part of the story. What sets Kepler apart is our team: bold thinkers, skilled builders, and passionate problem-solvers who thrive on pushing the boundaries of what's possible in space. We believe great ideas come from diverse perspectives, and we're committed to creating an environment where you can grow, lead, and make a global impact.

If you're ready to reach higher, move faster, and do work that shapes the future space economy - this is your launchpad. Come build the future with Kepler!

What We Offer:

• Competitive compensation with a robust equity plan to share in our success.
• Comprehensive coverage for health, dental, and vision insurance-including dependents.
• Unlimited vacation, supportive parental leave policy, and company-wide holiday shutdown.
• Semi-annual company-wide parties and frequent in-office team events.
• Relocation packages available for approved roles.
• $1,500 annual professional development fund to support your growth.
• Fully stocked Toronto office kitchen with snacks, drinks, games and top-notch kitchen appliances.
• Town Halls, Celebration Calls, and Company-wide events to stay connected and engaged.
• We're a certified Great Place to Work®, seven years in a row!

Key Responsibilities:

• Develop custom IP for new features of the Kepler satellite digital payloads
• Iterate on current DSP and interface designs to improve reliability
• Work with IP core vendors to integrate new functionality into the Kepler designs
• Work with lead engineers in developing the communications and network architecture of our future satellite constellation
• Participate in conceptual design studies of new spacecraft

Required Skills & Qualifications:

• Bachelor’s Degree in Computer Engineering, Electrical Engineering or equivalent
• 5+ yr. working experience with FPGA/RTL design
• Verilog, SystemVerilog, or VHDL with the willingness to learn or pivot to SystemVerilog
• Xilinx FPGA(s). Specifically, Zynq and UltraScale
• Solid understanding of timing principles, including clock domain crossing and timing closure
• Strong scripting skills (e.g Python, Tcl, csh/bash, etc.)
• Experience with FPGA tools (e.g Vivado, Quartus), HDL Simulation Tools (ModelSim)

Bonus Points:

• Masters of Science in Computer/Electrical Engineering, or equivalent
• Experience in coherent digital demodulation of waveforms such as BPSK, QPSK, QAM
• Experience with memory mapped interfaces such as AXI, Wishbone, Avalon
• Experience with high-speed transceivers for protocols such as JESD204B, PCIe, SATA
• Experience with Linting tools, Questa Sim or Riviera-Pro
• Experience with Xilinx Versal and RFSoC
• Experience designing printed circuit boards
• Knowledge of radio-frequency electronics design

Employment Equity & Accommodation Statement

Kepler Communications is an equal opportunity employer committed to building a diverse and inclusive workplace. We welcome applications from all qualified individuals, including women, Indigenous peoples, persons with disabilities, members of visible minorities, and people of all sexual orientations and gender identities.

If you require accommodation during any stage of the recruitment process, please contact our People & Culture team at [e-mail], and we will work with you to meet your needs.