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Mercor in San Francisco seeks an FPGA and digital hardware design engineer with hands-on, real-world experience in specialized applications. The role focuses on working with Vivado on Windows environments to deliver RTL design and verification.
The ideal candidate has hands-on hardware design skills, a proactive mindset, and the ability to capture high-resolution screenshots as part of validation artifacts. This position is based in San Francisco and requires on-site work.
We're looking for professionals with hands-on, real-world experience in specialized applications.
You must already have Vivado installed/available on your own PC running Windows, and be able to open it today. We do not provide software licenses, virtual machines, or hardware.
FPGA & Digital Hardware Design
Vivado | AMD/Xilinx FPGA and SoC design, synthesis and timing | FPGA and RTL design and verification engineers |
Must be able to capture screenshots with more than 2.5 megapixels. Satisfy this in either of two ways.
Option A — a single high monitor. Any of these aspect ratios, at or above the resolution shown:
MacBook Pro 14" (3024×1964) and 16" (3456×2234) built-in displays qualify.
Option B — a dual-monitor setup. Two displays side by side, captured as a single spanning image. Two 1920×1080+ monitors qualify. A single 1080p screen out of that pair does not.