FPGA Customer Quality Engineer

191 Altera Corporation; San Jose (CA); On-site; USD 118,900 - 210,000; Full time

Job summary

191 Altera Corporation is seeking a highly experienced FPGA Customer Quality Engineer in San Jose, California. The role focuses on driving product quality by troubleshooting and resolving customer-reported issues while ensuring collaboration across teams.

The ideal candidate has over 10 years of experience with FPGA and ASIC products, with expertise in digital logic design and providing technical support to customers. The position offers a competitive salary range between $118,900 and $210,000, reflecting the skills and experiences of the candidate.

Qualifications

• Minimum 10+ years of experience working with FPGA and/or ASIC products.
• 10+ years of experience applying digital logic design principles.
• 7+ years of experience leading FPGA and/or ASIC component debug activities.

Responsibilities

• Drive FPGA product quality with troubleshooting and debugging.
• Meet with customers and manufacturing partners for discussions.
• Ensure end-to-end quality with comprehensive investigations.

Skills

Experience with FPGA and/or ASIC products

Digital logic design principles

Technical support to external customers

Board-level design and debug

使用FPGA开发工具

High-speed interfaces

Tools

Altera Quartus

Job description

About the Role

We are seeking a highly experienced and capable FPGA Customer Quality Engineer (CQE) to drive FPGA product quality, strengthening the end customer experience. In this role, you will directly debug, support, drive and resolve customer reported issues focusing on chip hardware, boards and systems. This role is external facing through close partnerships with Altera end customers, including coordination of internal functional teams to drive root cause and systemic quality improvements.

Key Responsibilities

• Drive FPGA product quality by helping troubleshoot, debug, identify and resolve quality issues across hardware, firmware, software, board, system, and manufacturing, partnering with external customers, internal engineering, operations and supply chain teams.
• Meet with customers and manufacturing partners regularly (including travel on-site) for discussions and quality reviews to strengthen working partnerships and relationships, accelerate issue debug/resolution, and drive ongoing quality improvements.
• Ensure end‑end quality with internal improvement initiatives and reviews, partnering with Altera engineering and operations teams on issue investigations with root‑cause analysis, cross‑functional alignment, containment, internal correction/prevention actions and enforcement, timely communication and resolution.
• Partner with lead customers early to discuss and align on use cases, system level and environmental operating requirements, supporting product qualification and enabling collateral for production ramp‑up internally and at end‑customers.
• Develop and improve product quality and manufacturing data collection from external customers to support monitoring, testing, failure prediction/modeling, quality assessment and continuous improvement across Altera.

Salary Range

The pay range below is for Bay Area, California only. Actual salary may vary based on a number of factors including job location, job‑related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance: $118,900 – $210,000 USD.

Qualifications

• Minimum 10+ years of experience working with FPGA and/or ASIC products in one or more of the following areas: design, validation, test, quality engineering, lab debug, or applications engineering at component, hardware, or board level.
• 10+ years of experience applying digital logic design principles, including SRAM, FIFO, PLL, and related architectures.
• 7+ years of experience providing technical support to external customers for FPGA and/or ASIC‑based designs, including issue resolution and design guidance.
• 7+ years of experience leading FPGA and/or ASIC component debug activities, including root‑cause analysis and cross‑functional issue resolution.
• 7+ years of experience with board‑level design, bring‑up, validation, and/or debug of hardware systems.
• 7+ years of experience using FPGA development tools such as Altera Quartus or similar, with hands‑on knowledge of FPGA architecture, IP integration, and timing/voltage/temperature considerations.
• 5+ years of experience working with high‑speed interfaces such as Ethernet, PCIe, DDR, HDMI, USB, AXI, or similar protocols.

Preferred Qualifications

• 12+ years of experience working with FPGA and/or ASIC products in one or more of the following areas: design, validation, test, quality engineering, lab debug, or applications engineering at component, hardware, or board level.
• Strong analytical skills and attention to detail.
• Strong verbal and written communication skills.
• Effective organizational and planning skills.
• Ability to work independently as well as collaboratively in cross‑functional team environments.
• Willingness and ability to travel for customer and partner engagements as needed.

Job Type

Regular

Shift

Shift 1 (United States of America)

Primary Location

San Jose, California, United States

Additional Locations

Any additional locations as required.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.