Application Specific Integrated Circuit Design Engineer

Onyx; United States; Remote; USD 120,000 - 180,000; Full time

Benefits offered by this job

Remote-friendly

Job summary

A venture-backed silicon photonics startup is seeking an FPGA engineer to prototype and validate a novel photonic memory system by developing high-bandwidth digital interfaces. The ideal candidate will have extensive experience in FPGA RTL design and optimization on modern platforms, and familiarity with high-speed digital interfaces. This remote-friendly role favors candidates located in the Bay Area, aiming to contribute to next-generation AI infrastructures.

Qualifications

• Experience with high-speed digital interfaces and FPGA design.
• Knowledge of performance optimization on modern FPGA platforms.
• Familiarity with AI/ML inference pipelines is preferred.

Responsibilities

• Prototype and validate a novel photonic memory system.
• Build high-bandwidth digital interfaces.
• Work collaboratively in a remote-friendly environment.

Skills

FPGA RTL design and architecture (Verilog / SystemVerilog / VHDL)

High-speed digital interfaces (SERDES, PCIe, Ethernet, etc.)

High-throughput data pipelines and streaming architectures

Timing closure and performance optimization

Job description

We’re representing a venture-backed silicon photonics startup building high-performance PICs for next-generation AI infrastructure.

They’re looking for an FPGA engineer to help prototype and validate a novel photonic memory system by building high-bandwidth digital interfaces between compute logic and optically connected memory.

Experience with:

• FPGA RTL design and architecture (Verilog / SystemVerilog / VHDL)
• High-speed digital interfaces (SERDES, PCIe, Ethernet, or similar)
• High-throughput data pipelines and streaming architectures
• Timing closure and performance optimization on modern FPGA platforms

Nice to have:

• Experience with FPGA-based hardware bring-up and system validation
• Work with optical transceivers or high-speed networking hardware
• Background in accelerator systems, SmartNICs, or HPC FPGA platforms
• Familiarity with AI/ML inference pipelines or high-bandwidth compute workloads

Remote-friendly (US) with preference for Bay Area proximity.