Engineering Lead, Inference Optimization

Venice; Sheridan (WY); On-site; USD 150,000 - 230,000; Full time

Job summary

Venice is hiring a senior performance optimization leader to own the inference performance strategy and to recruit and lead the Inference Optimization Team. You will optimize GPU infrastructure across architectures, improve latency and throughput for large language model workloads, and build benchmarks to identify the best engines and quantization schemes.

You’ll evaluate new techniques and hardware viability, shaping Venice's high‑scale AI stack.

Qualifications

• 8+ years in performance optimization or HPC
• Strong GPU architecture and parallel programming knowledge
• Experience leading engineering teams
• Hands-on with production LLM inference engines and CUDA/C++ is a plus

Responsibilities

• Own Venice’s inference performance strategy
• Lead the Inference Optimization Team
• Optimize GPU infrastructure across architectures
• Improve latency, throughput, and cost per token for LLM inference
• Build benchmarking harnesses across inference engines
• Work with inference routing to optimize load‑balancing
• Evaluate new optimization techniques and hardware viability

Skills

GPU architecture

Performance optimization

Team leadership

Python

Rust/Go

CUDA/C++

Tools

Nsight Systems

Nsight Compute

PyTorch Profiler

Job description

About Us

Venice is the world’s leading consumer AI company built on principles of privacy, free speech, and user sovereignty.

We’re building the Port City of AI, in which millions of individuals, third party apps, and AI agents gather, interact, and access sophisticated AI resources on a private and permissive foundation. Our mission is to make artificial intelligence approachable and useful in everyday work—bridging the gap between cutting‑edge research and practical, real‑world impact.

We’re a fast‑moving startup where every team member is expected to make a clear impact. Our culture is rooted in curiosity, ownership, ethical principle, philosophy, and collaboration—whether we’re designing better AI workflows, supporting our growing community, or shaping the future of human‑AI interaction.

Joining Venice AI means joining a team of unorthodox builders who believe in moving quickly, delivering a beautiful mass-marketand highly useful consumer product that doesn’t spy on people or censor their ideas and questions., and maintaining an edge in the rapidly evolving world of agentic machine intelligence. If you’re energized by big ideas, entrepreneurial spirit, individual empowerment, and the opportunity to help shape a fast‑growing company in the world’s hottest industry from the ground up, please reach out.you’ll feel right at home here.

Why we are hiring

Venice is the only AI platform that runs inference with zero data retention and zero training on user inputs. This is an opportunity for you to be on the bleeding edge of privacy-focused AI with a unique and dedicated team of high-agency individuals alongside you. This role requires both hands on work as an individual contributor as well as the management of a small team. You will play a pivotal role, shaping Venice's overarching technical strategy and assembling an exceptional team to deliver peak inference performance at massive scale.

What you'll do

• Own Venice’s technical strategy for inference performance
• Recruit and lead the Inference Optimization Team at Venice
• Optimize Venice's GPU infrastructure across a range of architectures (e.g. H200s, B300s)
• Improve latency, throughput, and cost per token for LLM inference workloads
• Build reproducible benchmarking harnesses across inference engines (e.g. vLLM, SGLang) to identify the optimal engine, quantization scheme, and parallelism strategy per workload and GPU SKU
• Work with our inference routing system to optimize multivariate inference load-balancing algorithms
• Evaluate emerging inference optimization techniques (custom CUDA/Triton kernels), novel attention variants, new quantization schemes, and compilation stack improvements. Hands‑on kernel development experience is a strong plus.
• Evaluate emerging inference hardware (FPGAs, ASICs, custom silicon) for viability in Venice's stack.

Who you are

• 8+ years in performance optimization or HPC, with deep GPU architecture and parallel programming knowledge
• 5+ years experience leading engineering teams
• Proficiency in Python, Rust, or Go.
  • Bonus: C++/CUDA
• Hands‑on experience with at least one production LLM inference engine (e.g. vLLM, SGLang) running at high volume in production
• Demonstrated experience with LLM inference optimization techniques: continuous batching, PagedAttention/KV cache management, speculative decoding, quantization, CUDA graphs, and torch.compile
• Fluency with quantization tradeoffs, both qualitative and quantitative
• Experience with distributed inference strategies (tensor parallelism, pipeline parallelism, MoE parallelism) in multi‑GPU and multi‑node environments
• Fluency with GPU profiling (Nsight Systems, Nsight Compute, PyTorch Profiler) and a bias toward measuring before optimizing
• Bonus: diffusion/image model inference optimization, custom Triton kernels, contributions to open-source inference frameworks