Engineering Intern - Technical Program Management (Spring 2027 Co-op)

Rivian

Palo Alto (CA)

Vor Ort

USD 128.943.000 - 146.136.000

Vollzeit

Vor 4 Tagen
Sei unter den ersten Bewerbenden

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Benefits dieser Stelle

Paid vacation
Paid sick leave
Medical insurance

Zusammenfassung

Rivian seeks a driven Engineering Intern to join the Silicon Development team working on System-on-Chip (SoC) development programs from architecture through tapeout and bring-up for ADAS hardware.

You will collaborate across Architecture, RTL, DV, Firmware, Software, and Supply Chain to drive end-to-end execution while gaining exposure to leadership and cutting-edge automotive semiconductor work at Rivian's Palo Alto campus.

Qualifikationen

  • Must be currently pursuing a bachelor's, master's, or PhD degree at an accredited university.
  • Actively pursuing a degree in Electrical/Computer Engineering or Computer Science.
  • Experience in pre-silicon (RTL/DV/Tapeout) or post-silicon (Bring‑up/Operations/Supply Chain) is a plus.
  • Good communication skills.
  • Experience with JIRA or similar tracking workflows for cross-functional alignment.
  • Self-motivated and willing to learn and adapt to changing priorities.

Aufgaben

  • Own the integrated silicon program plan—including architecture definition, RTL design, DV milestones, physical design closure, DFT, tapeout, and post-silicon bring-up.
  • Cross-functional coordination with Architecture, RTL, DV, Firmware, Software, Package/Board, and Supply Chain teams.
  • Vendor & Foundry Management: coordinate external partners including semiconductor foundries, IP vendors, ASIC design services.
  • Risk & Dependency Tracking: identify critical-path risks, monitor design maturity, track coverage metrics, and maintain escalation paths.
  • Leadership Communication: act as liaison between engineering teams and executive leadership.

Kenntnisse

Good communication
Self-motivated

Ausbildung

Bachelor's degree in Electrical/Computer Engineering or Computer Science
Pursuing master's or PhD

Tools

JIRA

Jobbeschreibung

About Us

Rivianis on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract.

As a company, we constantly challenge what’s possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it for future generations.

Role Summary

Rivian internships are experiences optimized for student candidates.To be eligible, you must be an undergraduate or graduate student in an accredited program during the internship term with an expected graduation date between December 2027 and 2029.Rivian's Internship Program requires active student enrollment. Information regarding your expected degree completion date is collected solely to verify eligibility and determine your availability for future full-time opportunities. Rivian is an equal opportunity employer and does not use graduation dates to determine the age of applicants or as a basis for discriminatory hiring decisions.

If you are not pursuing a degree, please see our full time positions on our Rivian careers site.Note that if your university has specific requirements for internship programs, it is your responsibility to fulfill those requirements.

Our Spring Co-op program runs from Jan-Aug 2027. In order to be considered for this role, you must be available to work onsite, full time (40 hours per week), for the entire duration. If you're unable to work during the spring semester, please instead apply to our Summer Internship Program.

No Visa Sponsorship

In this role, you will focus on working closely with the Silicon Development team here at Rivian. Technical Program Managers are responsible for driving the end-to-end execution of Rivian's SoC (System-on-Chip) development programs from early architecture through tapeout, bring‑up, and production aimed at ADAS hardware.

Responsibilities
  • Own the integrated silicon program plan—including architecture definition, RTL (Register-Transfer Level) design, Design Verification (DV) milestones, physical design (PD) closure, DFT (Design for Test), tapeout, and post-silicon bring‑up.
  • Cross-Functional Coordination: Partner tightly with Architecture, RTL, DV, Firmware, Software, Package/Board, and Supply Chain teams to eliminate bottlenecks and align hardware software co-design.
  • Vendor & Foundry Management: Coordinate external partners, including semiconductor foundries, IP vendors, ASIC design services
  • Risk & Dependency Tracking: Identify critical-path schedule risks, monitor design maturity, track coverage metrics, and maintain clear escalation paths.
  • Leadership Communication: Act as the primary liaison between engineering teams and executive leadership, translating complex technical trade-offs into actionable decisions.
Qualifications
  • Must be currently pursuing a bachelors, masters, or PhD degree at an accredited university
  • Actively pursuing a degree or one closely related in Electrical/Computer Engineering or Computer Science
  • Experience in pre-silicon (RTL/DV/Tapeout) or post-silicon (Bring‑up/Operations/Supply Chain) is a plus
  • Good communication skills
  • Experience with JIRA or other similar tracking workflows for cross-functional tracking and alignment.
  • Self motivated and willing to learn and adapt to changing priorities.
Pay Disclosure

The salary range for this role is $45.00-51.00 per hour for Palo Alto based applicants. This is the lowest to highest salary we in good faith believe we would pay for this role at the time of this posting. An employee’s position within the salary range will be based on several factors including, but not limited to, specific competencies, relevant education, qualifications, certifications, experience, skills, geographic location, shift, and organizational needs.

We offer a comprehensive package of benefits including but not limited to paid vacation, paid sick leave, and medical insurance benefits. Internship positions are not eligible for retirement benefits. More information about benefits is available at rivianbenefits.com.

Company Statements
Equal Opportunity

Rivian is an equal opportunity employer and complies with all applicable federal, state, and local fair employment practices laws. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, ancestry, sex, sexual orientation, gender, gender expression, gender identity, genetic information or characteristics, physical or mental disability, marital/domestic partner status, age, military/veteran status, medical condition, or any other characteristic protected by law.

Rivian is committed to ensuring that our hiring process is accessible for persons with disabilities. If you have a disability or limitation, such as those covered by the Americans with Disabilities Act, that requires accommodations to assist you in the search and application process, please email us at candidateaccommodations@rivian.com.

Candidate Data Privacy and Technology

Rivian may collect, use and disclose your personal information or personal data (within the meaning of the applicable data protection laws) when you apply for employment and/or participate in our recruitment processes (“Candidate Personal Data”). This data includes contact, demographic, communications, educational, professional, employment, social media/website, network/device, recruiting system usage/interaction, security and preference information. Rivian may use your Candidate Personal Data for the purposes of (i) tracking interactions with our recruiting system; (ii) carrying out, analyzing and improving our application and recruitment process, including assessing you and your application and conducting employment, background and reference checks; (iii) establishing an employment relationship or entering into an employment contract with you; (iv) complying with our legal, regulatory and corporate governance obligations; (v) recordkeeping; (vi) ensuring network and information security and preventing fraud; and (vii) as otherwise required or permitted by applicable law.

Rivian may share your Candidate Personal Data with (i) internal personnel who have a need to know such information in order to perform their duties, including individuals on our People Team, Finance, Legal, and the team(s) with the position(s) for which you are applying; (ii) Rivian affiliates; and (iii) Rivian’s service providers, including providers of background checks, staffing services, and cloud services.

Rivian may transfer or store internationally your Candidate Personal Data, including to or in the United States, Canada, the United Kingdom, and the European Union and in the cloud, and this data may be subject to the laws and accessible to the courts, law enforcement and national security authorities of such jurisdictions.

How We Use AI in Our Hiring Process: To ensure transparency, we want candidates to know that Rivian uses iCIMS Talent Cloud Artificial Intelligence (TCAI) and AI-enabled tools to assist with screening, reviewing, organizing and highlighting profiles and applications that match the key requirements for each role.

AI does not make hiring decisions: Qualified candidate applications are reviewed by a member of our team, and all decisions throughout the process are made by humans. We use AI to support efficiency and consistency, not to replace human judgment. We are committed to a fair, thoughtful, and equitable experience for every candidate.

Participation in AI profile matching is entirely voluntary. If you prefer that your profile not be used in this process, you can opt out at any time. Opting out means your profile will be excluded from automated matching and will not be surfaced for additional roles through this system. Your current application remains active and will not be affected in any way.

Please note that we are currently not accepting applications from third party application services.

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