Emulation Engineer

InterSources Inc; Saratoga (CA); On-site; USD 120,000 - 160,000; Full time

Job summary

InterSources Inc. is seeking a hardware verification engineer skilled in Verilog/SystemVerilog, C/C++, and Python to work on emulation-based verification infrastructure in California.

You will leverage Palladium/Veloce/Zebu and FPGA prototyping to validate complex SoCs, build robust testbenches, and automate workflows. The role requires strong debugging capabilities with waveforms, logs, and trace dumps, plus experience with Jenkins or GitLab CI to streamline continuous integration and testing

Qualifications

• Proficiency in Verilog/SystemVerilog, C/C++, Python, and Unix Shell scripting.
• Experience with hardware emulation platforms and FPGA prototyping.
• Familiarity with emulation tools, BFMs, transactors, and hybrid environments.
• Ability to debug hardware using waveforms, logs, and trace dumps.
• Experience with CI/CD tools (Jenkins, GitLab CI) for automation.

Skills

Verilog/SystemVerilog

C/C++

Python

Unix Shell scripting

Tools

Palladium

Veloce

Zebu

FPGA prototyping

Jenkins

GitLab CI

Job description

• Proficiency in Verilog/SystemVerilog, C/C++, Python, and Unix Shell scripting.
• Experience with emulation platforms such as Palladium, Veloce, Zebu, or FPGA prototyping.
• Familiarity with emulation tools and methodologies including BFMs, transactors, and hybrid environments.
• Ability to debug hardware issues using waveforms, logs, and trace dumps.
• Experience with CI/CD tools (e.g., Jenkins, GitLab CI) for automation and integration.
• Excellent problem-solving, debugging, and analytical skills.