Embedded CPU Performance Engineer, Platform Architecture

Apple, Inc.; Beaverton (OR); Presencial; USD 180.000 - 240.000; Jornada completa

Descripción de la vacante

Apple seeks an Embedded CPU Performance Engineer to define CPUs for embedded apps across iPhone, iPad, Mac and more. You will work with CPU designers to model and implement performance and power optimizations, balancing area and efficiency.

You will analyze diverse workloads, correlate RTL with simulators, and contribute to data-driven decisions within the CPU Platform Architecture team. A strong background in microarchitecture and scripting complements the role.

Formación

• Experience in CPU and SOC architecture.
• Experience with performance simulation environments.
• Strong programming in C/C++ and scripting in Perl or Python.

Responsabilidades

• Define CPUs designed for embedded applications across iPhone, iPad, Mac and Apple products.
• Collaborate with CPU designers to assess feasibility of ideas via modeling and refine for implementation.
• Correlate RTL with CPU performance simulator to meet targets and ensure model accuracy.
• Analyze workloads across product categories to identify bottlenecks and optimization opportunities.

Conocimientos

CPU architecture

SOC architecture

Performance simulation

C/C++

Python

Perl

Educación

MS/PhD in Electrical or Computer Engineering or Computer Science

Descripción del empleo

Embedded CPU Performance Engineer, Platform Architecture

Do you get more energy from the hardest problem in the room than the easiest one? Do you want a hand in shaping the CPUs that run quietly inside nearly every Apple product from the one your iPhone relies on to capture the perfect photo, to the one guarding your Apple Watch? The CPU Platform Architecture team exists to push the limits of power-efficient CPU performance, and we hold ourselves to a standard most teams wouldn’t bother with. We’re a tight-knit group obsessed with squeezing every drop of performance out of every milliwatt, bringing together deep expertise in microarchitecture, ISA definition, performance modeling, power modeling, and workload analysis.We’re looking for a highly motivated and innovative Embedded CPU Engineer to join us. In this role, you’ll drive performance and efficiency optimization and explore architectural features for Apple’s embedded CPUs that power critical functions across Apple’s entire product line.

Description

As an Embedded CPU Performance Engineer, you will help define CPUs that are specifically designed for running embedded applications across iPhone, iPad, Mac, and many other Apple products. Your focus will be to seek out areas for improvement in the unique constraints of varied embedded use cases, and model solutions that balance performance, power efficiency, and area. To do this you will collaborate with experienced CPU designers in micro-architecture and RTL to assess the feasibility of ideas through modeling and refine those ideas to make them implementable. You will also correlate RTL with the CPU performance simulator to ensure that the design meets targets and that the model is accurate. The role requires the analysis of specific workloads across a wide variety of existing and new product categories to identify bottlenecks and opportunities for improvement. We collaborate as a larger CPU architecture and performance team to maintain and improve the simulation and correlation environments to enable data driven decisions and look for ways to boost the productivity of the entire team.

Minimum Qualifications

• Experience in CPU and SOC architecture and micro-architecture


• Experience with performance simulation environments


• Object-oriented programming skills in C/C++


• Experience in a scripting language such as Perl or Python

Preferred Qualifications

• Expertise in CPU microarchitecture in one or more of the following areas: branch prediction, prefetching, pipeline optimization, datapath, memory hierarchy


• 10+ years of relevant industry experience


• MS or PhD in Electrical or Computer Engineering or Computer Science


• Understanding of common data structures and algorithms


• Familiarity with SIMD, vector, or accelerator architectures


• Understanding of: power-performance trade-offs in CPU designs, system-level power management, and low-power design techniques


• Comfortable in an environment of uncertainty and able to navigate through ambiguities


• Experience in a research-driven environment

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