Director, Package Design Engineering

Renesas Electronics Corp.; Austin (TX); On-site; USD 140,000 - 210,000; Full time

Job summary

Renesas Electronics Corp. is seeking an senior-level professional to lead Package Technology Development/NPI, R&D, and Global OSAT management for new package development and product qualification.

The role supports technology roadmaps and budgets while driving customer adoption programs. You will focus on design and development of package and interconnect methods for AI/datacenter infrastructure power packaging, including Smart Power Stages, Vertical Power Stages, Power Modules & Discrete FETs.

Qualifications

• Doctorate/Masters/Bachelor’s Degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering
• 15–20 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip packaging
• Strong understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC and statistical analysis software
• Knowledge of wire-bonding & multi-chip module technologies a plus
• Strong interpersonal and communication skills
• Strong analytical and presentation skills

Responsibilities

• Package Technology Development/NPI, R&D, Global OSAT management for new Package Development/Product qualification, Technology Roadmap definition, R&D budget management & customer adoption programs
• Design and develop package and interconnect methods for AI/Datacenter infrastructure power packaging
• Benchmark, select and qualify materials, processes and OSAT/CM
• Collaborate with OSAT/CM to optimize processes and establish specs
• Work with Product groups and Reliability team to qualify new packages and processes
• Resolve process integration issues with window checks on critical steps
• Establish production controls and ramp-up monitoring
• Ensure quality and timely transition into production with OSAT/CM

Skills

Power SiP/modules

Wafer level packaging

Flip-chip packaging

SPC/Statistical analysis

Wire bonding

Communication skills

Education

Engineering degree (PhD / MS / BS) in Physics, Chemistry, Mechanical, Electrical or Materials

Tools

SPC software

Statistical analysis tools

Job description

• Package Technology Development/NPI, R&D, Global OSAT management for new Package Development/Product qualification, Technology Roadmap definition, R&D budget management & customer adoption programs.
• Focus on design and development of package and interconnect methods for Renesas's AI/Datacenter Infrastructure Power packaging needs especially Smart Power Stages, Vertical Power Stages, Power Modules & Discrete FET packages. Scope also involves WBG (Ie. SiC & GaN) development along with DBC, AMB substrates and advanced interconnect technologies. Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
• Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).
• Work with OSAT/CM to develop, run DOE to optimize processes and establish process spec.
• Work with Product groups and Reliability team, qualify new packages and processes within required time frame.
• Resolve all process integration issues by ensuring all window checks are done on critical process steps.
• Establish production controls and monitors to ensure there is no room for quality incidents.
• Ensure smooth transition into production & implement ramp up monitor.
• Work with OSAT/CM to monitor and resolve process issues early in the production phase to ensure only parts with superior quality shipped to customer.
• Develop and maintain technical expertise on advances and innovations in power SiP/modules, wafer level packaging & flip chip interconnects.
• Participate in packaging roadmap development & focus on execution.
• Address internal and external customer complaints working with peers of Marketing, Product groups, Quality and Operations organization to satisfy growth in businesses.
• Establish & maintain package design rules.

Responsibilities

• Package Technology Development/NPI, R&D, Global OSAT management for new Package Development/Product qualification, Technology Roadmap definition, R&D budget management & customer adoption programs.
• Focus on design and development of package and interconnect methods for Renesas's AI/Datacenter Infrastructure Power packaging needs especially Smart Power Stages, Vertical Power Stages, Power Modules & Discrete FET packages. Scope also involves WBG (Ie. SiC & GaN) development along with DBC, AMB substrates and advanced interconnect technologies. Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
• Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).
• Work with OSAT/CM to develop, run DOE to optimize processes and establish process spec.
• Work with Product groups and Reliability team, qualify new packages and processes within required time frame.
• Resolve all process integration issues by ensuring all window checks are done on critical process steps.
• Establish production controls and monitors to ensure there is no room for quality incidents.
• Ensure smooth transition into production & implement ramp up monitor.
• Work with OSAT/CM to monitor and resolve process issues early in the production phase to ensure only parts with superior quality shipped to customer.
• Develop and maintain technical expertise on advances and innovations in power SiP/modules, wafer level packaging & flip chip interconnects.
• Participate in packaging roadmap development & focus on execution.
• Address internal and external customer complaints working with peers of Marketing, Product groups, Quality and Operations organization to satisfy growth in businesses.
• Establish & maintain package design rules.

Qualifications

• Doctorate/Masters / Bachelor’s Degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
• 15 to 20 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip packaging
• Strong understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC and statistical analysis software
• Knowledge of wire-bonding & multi-chip module technologies a plus.
• Strong interpersonal and communication skills.
• Strong analytical and presentation skills.

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.