Director ASIC Technical Program Management

Hardware FYI; San Jose (CA); On-site; USD 210,000 - 275,000; Full time

Job summary

Astera Labs, based in the USA, seeks a Director ASIC Technical Program Management to lead the US TPM team across cross-functional ASIC programs from early planning through production release. You will mentor TPMs, ensuring governance and visibility across the portfolio while staying hands-on as needed.

You will drive milestone planning, risk mitigation, and executive alignment, ensuring program readiness at tapeout and production gates, and partner with customers and partners to uphold

Qualifications

• Owned full ASIC program lifecycle end-to-end from architecture to release.
• Led cross-functional teams across design, validation, product, test, firmware, software, and operations.
• Able to drive planning, scheduling, budgeting, resource allocation, and risk management with minimal oversight.

Responsibilities

• Lead the US-based TPM team and the cross-functional execution framework for advanced ASIC programs.
• Ensure program readiness at gates such as tapeout, power-on, and production release.
• Provide transparent real-time program health and priority reporting to executives and stakeholders.
• Collaborate with external partners and customers as a senior program representative.

Skills

Program leadership

ASIC development experience

Cross-functional leadership

Risk management

Education

BS or MS in Electrical, Electronics, or Computer Engineering

Tools

RTL

DSP

Physical design

Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Role Overview

We are looking for a Director ASIC Technical Program Management to join the PMO organization at Astera Labs, based in the USA.

In this role, you will directly manage a team of Technical Program Managers (TPMs) located across the United States.

You will be responsible for mentoring and developing your team, ensuring alignment on methodology, and maintaining full visibility into program status across the portfolio. While your primary focus is people leadership, you are expected to remain hands‑on — stepping in to lead programs directly when the need arises.

What You’ll Do

You will lead the US-based TPM team, which owns the cross-functional execution framework for advanced ASIC programs from early planning through production release. Your team drives milestone planning, dependency management, execution reviews, decision‑making forums, and risk mitigation across multiple engineering disciplines.

You will be accountable for program readiness at key gates — including tapeout, power‑on, and production release — and will set the standard for how execution is tracked, communicated, and acted upon across the organization.

A core part of your role is bringing consistency and clarity to program status reporting. You will work closely with executive leadership and the PLM team to enable fast, well-informed decision‑making, and to ensure that all functions have transparent, real‑time visibility into program health and priorities.

You will partner directly with external partners and customers as a senior representative of the program.

Why This Role Matters

This is a high-impact leadership position for someone who thrives in a fast‑paced, ambiguous environment. You will be expected to drive accountability, manage complexity across multiple concurrent programs, and build scalable execution practices that strengthen the team's ability to deliver world‑class silicon.

Your Background

Program Ownership & Execution

You have owned the full ASIC program lifecycle end-to‑end — from architecture and RTL through physical design, tapeout, validation, customer sampling, qualification, and release to manufacturing. You are comfortable serving as the single point of accountability for assigned programs, driving planning, scheduling, budgeting, resource allocation, and risk management with minimal oversight.

Cross‑Functional Leadership & Issue Resolution

You have a strong track record leading cross‑functional teams spanning design, validation, product, test, firmware, software, and operations. When complex pre‑silicon or post‑silicon issues arise, you bring the technical judgment needed to cut through ambiguity, align the right people, and drive resolution quickly.

Stakeholder Management & Alignment

You are skilled at navigating scope, schedule, and cost trade‑offs, and at communicating program status, risks, and decisions clearly to executives and stakeholders at all levels. You know how to champion rigorous execution while keeping engineering delivery tightly aligned with business priorities and customer commitments.

People Leadership

Prior experience managing TPMs or leading technical teams is a strong plus. Candidates with a proven people management background — including hiring, mentoring, and developing technical contributors — will be given preference. That said, we recognize that great leaders are built in different ways: candidates who bring deep, hands‑on experience delivering multiple ASIC programs from concept through production, combined with strong coaching instincts, clear communication, and the ability to inspire and align a team, are encouraged to apply.

If you have the technical credibility and the people skills, we want to hear from you.

Basic Qualifications

• BS or MS in Electrical, Electronics, or Computer Engineering
• 15+ years of ASIC product development experience in a semiconductor environment
• Strong understanding of ASIC development flows, with hands‑on experience in RTL, DSP, or Physical
• Design Experience delivering ASICs in advanced nodes
• Proven ability to lead in a matrixed, high‑pressure environment
• Strong program management and Leadership skill

Salary range is $210,000 to $275,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives, and benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.