Digital/RTL IC Design Engineer

Omni Design Technologies, Inc.; Austin (CO); On-site; USD 90,000 - 120,000; Full time

Job summary

Omni Design Technologies, Inc. is seeking a Digital Design Engineer to focus on high-performance analog-to-digital and digital-to-analog converters. Responsibilities include RTL design, verification, and supporting synthesis and timing closure for cutting-edge digital controllers.

The ideal candidate will have a strong foundation in digital design for ASICs and hands-on experience with Verilog coding. Excellent compensation is offered by the company.

Qualifications

• 2+ years of experience in high-performance digital or mixed-signal IC development.
• Hands-on experience with RTL design and verification.
• Strong understanding of mixed signal control loops.

Responsibilities

• Perform RTL design, verification, and behavioral modelling.
• Support synthesis, timing closure, and P&R flow for digital controllers.
• Write thorough testbenches for digital design.

Skills

Digital design concepts for complex ASICs

Verilog RTL coding

Signal processing

Education

BS/BE/MS/MTech

Tools

SystemVerilog

MATLAB

Job description

Digital Design Engineer focusing on high-performance analog‑to‑digital and digital‑to‑analog converters. Responsibilities include RTL design, verification, behavioral modelling, and support of synthesis, timing closure, and P&R flow for the digital controller of high‑performance data converters in cutting‑edge technologies.

Qualifications

• BS/BE/MS/MTech + 2 years or equivalent experience in high‑performance digital or mixed‑signal IC development in advanced CMOS processes
• Strong foundation in digital design concepts for complex ASICs
• Hands‑on experience with Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc.
• Strong understanding of digital design for mixed signal control loops and designing Verilog code to control analog circuits (e.g., digital backend for ADC, digital PLL, etc.)
• Familiarity with behavioral Verilog code, including wreals
• Ability to write thorough testbenches
• Basic understanding of SystemVerilog and assertions preferred
• Basic understanding of signal processing – MATLAB preferred but not mandatory
• Understanding of constraints, especially for mixed‑signal designs, including multiple clock domains and clock gating

We offer excellent compensation.

Omni Design is an equal opportunity employer.