Digital Mixed-Signal System Architect

Renesas Electronics; Austin (TX); On-site; USD 150,000 - 210,000; Full time

Job summary

Renesas Electronics seeks an experienced Digital Mixed-Signal System Architect to define, model, and validate digital data paths for next‑generation digital power management products in AI, datacenter, and HPC applications.

The role links analog sensing to control-loop decisions through ADC interfaces, controllers, front-end DSP, and telemetry, shaping executable architectures and silicon-validation evidence.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
• 8+ years of experience in digital systems architecture, mixed-signal SoC architecture, digital signal processing, power management, control-oriented digital design, semiconductor verification, or related product development.
• Strong understanding of digital signal-processing concepts, fixed-point arithmetic, sampling theory, filtering, timing, latency, quantization, saturation, and numeric precision tradeoffs.
• Experience defining ADC-facing digital logic, sensor data paths, telemetry data paths, digital controllers, or control-loop support logic in a semiconductor product environment.
• Ability to translate system-level requirements into RTL-facing architecture, firmware-visible behavior, emulation models, and validation-ready specifications.
• Strong cross-functional communication skills, including the ability to align systems, digital design, firmware, analog, verification, validation, applications, and software/tool teams.

Responsibilities

• Define digital mixed-signal system architecture for digital multiphase power controllers and related power management products.
• Architect front-end digital signal-processing paths used to filter, condition, scale, decimate, observe, and route sensed voltage and current information into control-loop, telemetry, protection, and diagnostic functions.
• Define ADC interface behavior, ADC controller requirements, sampling relationships, data-valid timing, channel sequencing, calibration hooks, latency budgets, saturation behavior, quantization expectations, and error-handling requirements.
• Develop executable models and emulation-oriented representations that allow system behavior to be explored before RTL and silicon are complete.
• Translate system and control-loop requirements into RTL-facing specifications, fixed-point formats, datapath constraints, register behavior, firmware interfaces, and validation requirements.
• Collaborate with analog design experts on ADC and sensing assumptions while focusing ownership on the digital architecture, control data path, emulation behavior, and system-level integration.
• Work with firmware teams to define observability, debug access, telemetry behavior, configuration flows, and bring-up hooks needed for characterization and customer support.
• Partner with verification and validation teams to define reference scenarios, pass/fail criteria, correlation expectations, coverage targets, and structured evidence for architectural decisions.
• Analyze tradeoffs across loop performance, latency, noise sensitivity, resolution, dynamic range, power, area, configurability, implementation complexity, and customer-visible behavior.
• Document architecture clearly for cross-functional execution teams, including assumptions, interface contracts, model behavior, limits, corner cases, and validation expectations.

Skills

Digital systems architecture

Mixed-signal SoC architecture

Digital signal processing

Power management

Control-oriented digital design

Semiconductor verification

Cross-functional communication

Education

Bachelor's degree in Electrical/Computer Engineering

Tools

SystemVerilog

Python

MATLAB

C/C++

Emulation

FPGA prototyping

Job description

Renesas is seeking an experienced Digital Mixed-Signal System Architect to define, model, and validate the digitally implemented mixed-signal data paths used in next-generation digital power management products for AI, datacenter, and high-performance computing applications.

This role focuses on the digital architecture that connects real-world analog measurements to control-loop decisions: ADC interfaces, ADC controllers, front-end filtering, digital signal processing, telemetry paths, emulation models, timing behavior, fixed-point implementation, and hardware/firmware interface definition.

The successful candidate will work closely with systems, digital design, firmware, verification, validation, applications, and analog design teams to translate product requirements into executable architecture, emulation-ready models, RTL-facing specifications, and silicon-validation evidence. This is not a traditional analog design role; it is a digital systems architecture role for mixed-signal power products.

WHY THIS ROLE MATTERS

• Own the digital mixed-signal architecture between sensed power-rail behavior and control-loop action.
• Define reusable front-end DSP, ADC-control, emulation, and observability patterns for advanced digital power products.
• Help product teams converge faster by making mixed-signal behavior executable, measurable, and traceable from model to RTL to silicon.

KEY RESPONSIBILITIES

• Define digital mixed-signal system architecture for digital multiphase power controllers and related power management products.
• Architect front-end digital signal-processing paths used to filter, condition, scale, decimate, observe, and route sensed voltage and current information into control-loop, telemetry, protection, and diagnostic functions.
• Define ADC interface behavior, ADC controller requirements, sampling relationships, data-valid timing, channel sequencing, calibration hooks, latency budgets, saturation behavior, quantization expectations, and error-handling requirements.
• Develop executable models and emulation-oriented representations that allow system behavior to be explored before RTL and silicon are complete.
• Translate system and control-loop requirements into RTL-facing specifications, fixed-point formats, datapath constraints, register behavior, firmware interfaces, and validation requirements.
• Collaborate with analog design experts on ADC and sensing assumptions while focusing ownership on the digital architecture, control data path, emulation behavior, and system-level integration.
• Work with firmware teams to define observability, debug access, telemetry behavior, configuration flows, and bring-up hooks needed for characterization and customer support.
• Partner with verification and validation teams to define reference scenarios, pass/fail criteria, correlation expectations, coverage targets, and structured evidence for architectural decisions.
• Analyze tradeoffs across loop performance, latency, noise sensitivity, resolution, dynamic range, power, area, configurability, implementation complexity, and customer-visible behavior.
• Document architecture clearly for cross-functional execution teams, including assumptions, interface contracts, model behavior, limits, corner cases, and validation expectations.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
• 8+ years of experience in digital systems architecture, mixed-signal SoC architecture, digital signal processing, power management, control-oriented digital design, semiconductor verification, or related product development.
• Strong understanding of digital signal-processing concepts, fixed-point arithmetic, sampling theory, filtering, timing, latency, quantization, saturation, and numeric precision tradeoffs.
• Experience defining ADC-facing digital logic, sensor data paths, telemetry data paths, digital controllers, or control-loop support logic in a semiconductor product environment.
• Ability to translate system-level requirements into RTL-facing architecture, firmware-visible behavior, emulation models, and validation-ready specifications.
• Strong cross-functional communication skills, including the ability to align systems, digital design, firmware, analog, verification, validation, applications, and software/tool teams.

PREFERRED QUALIFICATIONS

• Master's degree or PhD in Electrical Engineering, Computer Engineering, Signal Processing, Control Systems, Power Electronics, or a related discipline.
• Experience with digital power controllers, DC/DC converters, voltage regulators, power management ICs, multiphase control, or high-current datacenter power applications.
• Experience with RTL architecture, SystemVerilog, Python, MATLAB, C/C++, emulation, FPGA prototyping, behavioral modeling, real-number modeling, or hardware/software co-design.
• Experience with ADC controller architecture, coherent sampling, digital filtering, decimation, telemetry, protection paths, loop compensation support, or real-time control data paths.
• Experience creating reusable models, reference tests, or structured engineering data that improve model-to-RTL, model-to-emulation, or model-to-silicon correlation.
• Ability to work comfortably at the boundary between algorithms, hardware architecture, firmware interface definition, and silicon validation evidence.