Design Verification Technical Leader

Cisco; Allentown (Lehigh County); On-site; USD 192,000 - 276,000; Full time

Job summary

Cisco is seeking a Design Verification Technical Leader to drive verification for high-speed silicon photonics driver ICs used across routing, switching, and data center platforms. You will lead verification strategy, coordinate across sites, and mentor engineers to ensure robust testability and performance.

Lead efforts for block- and chip-level verification, influence architecture, and collaborate with architecture and design teams to deliver scalable verification environments.

Qualifications

• Experience in SystemVerilog, UVM, and verification methodologies.
• Experience owning and delivering verification for large-scale SoCs or subsystems.
• Experience leading verification teams or projects.
• Experience scripting and automation (Python, Perl, TCL, or Shell).

Responsibilities

• Define and lead verification methodology and standards across multiple projects, coordinating activities across multiple sites.
• Lead verification at block & chip level with high-speed IPs (ODSP, D2D IP, SerDes XSR/PAM4, Integrated drivers/TIA).
• Review specifications, participate in design reviews, influence architecture for testability and verification efficiency.
• Mentor and coach verification engineers, driving continuous improvement in technical skills and execution.
• Debug complex silicon and system-level issues during bring-up phases.
• Support post-silicon bring-up and optimize integration and performance.

Skills

SystemVerilog

UVM

Python

Education

Bachelor’s degree in Electrical or Computer engineering

Master’s degree in Electrical or Computer Engineering

PhD in Electrical/Computer Engineering

Tools

Veloce

HAPS

Job description

The application window is expected to close on: 11/23/2026

Meet the Team

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Your Impact

As part of Cisco’s industry-defining Silicon One Optics group, you won’t just follow the future of networking—you’ll engineer it. We are actively building the hyper-scalable optical transceivers and modules (800G, 1.6T, and beyond) powering the world’s most demanding AI/ML workloads and next-gen data centers.

As our Design Verification Technical Leader, you’ll step straight into the driver’s seat. You will lead the verification of high-speed silicon photonics driver ICs (pushing 100/200/400G per Lambda) directly integrated across Cisco’s flagship routing, switching, and data center platforms. The AI infrastructure boom is happening right now—this is your opportunity to lead the silicon innovations making it possible before the rest of the industry catches up.

• Define and lead verification methodology and standards across multiple projects, coordinating activities across multiple sites.
• Lead verification at block & chip level with various high-speed IPs integrated like ODSP, D2D IP, SerDes XSR/PAM4, Integrated drivers/TIA, and control functions.
• Review specifications, participate in design reviews, and influence architecture for testability and verification efficiency.
• Mentor and coach verification engineers, driving continuous improvement in technical skills and execution.
• Debug complex silicon and system-level issues during bring-up phases.
• Support post-silicon bring-up and optimize integration and performance.

Minimum Qualifications

• Bachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design Verification experience, or Master’s degree in Electrical Engineering or Computer Engineering and 6+ years of ASIC Design experience, or PhD in Electrical Engineering or Computer Engineering + 3 years in ASIC Design Verification experience.
• Experience in System Verilog, UVM, and verification methodologies
• Experience owning and delivering verification for large-scale SoCs or subsystems.
• Experience leading verification teams or projects.
• Experience in scripting and automation such as Python, Perl, TCL, or Shell Scripts.

Preferred Qualifications

• Strong experience with UVM (Universal Verification Methodology) for developing scalable, reusable, and coverage-driven verification environments.
• Expertise in verification of SerDes IP, D2D PHY IP, ODSP & integrated transceiver features, CPU sub-system & Protocols (Ethernet, UCIE, UAL, SPI/I2C, etc.)
• Experience influencing design for testability and verification.
• Proven experience in troubleshooting and debugging.
• Experience with Formal Verification, hardware description languages (HDLs) such as Verilog/System Verilog)
• Experience with emulation and prototyping platforms (Veloce, HAPS).
• Experience collaborating with architecture and design teams on verification strategy.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $192,400.00 to $275,800.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
• 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
• Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
• Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
• 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
• Additional paid time away may be requested to deal with critical or emergency issues for family members
• Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

• .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
• 1.5% of incentive target for each 1% of attainment between 50% and 75%;
• 1% of incentive target for each 1% of attainment between 75% and 100%; and
• Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$214,100.00 - $356,300.00

Non-Metro New York state & Washington state:

$192,400.00 - $317,200.00

• For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

Cisco is an Affiantive Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.

Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.