Defect Metrology Engineer

Intel Corporation; Chandler (AZ); Hybrid; USD 115,000 - 220,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel Corporation in Phoenix, AZ, is seeking a Yield Development Engineer to drive yield improvements across cutting-edge technology nodes and advance semiconductor process tech. You will work with cross-functional teams to turn data into actionable insights that support rapid, reliable product ramp.

Join a collaborative environment that emphasizes innovation, statistical rigor, and scalable methodologies while operating in a hybrid work model across US locations.

Qualifications

• Bachelor’s degree in Electrical Engineering, Materials Science, Mechanical Engineering, Semiconductor Technology, or related field.
• Bachelor’s degree with 4+ years of experience, Master’s with 3+ years, or PhD with 1+ years.
• 2+ years of experience in yield development, process technology, or related field.
• Experience in statistical analysis and data visualization tools.

Responsibilities

• Identify root cause yield limiters throughout the lifecycle of a technology node and develop solutions to address them.
• Perform statistical analysis and create visualizations to construct accurate process development roadmaps that drive technology yield milestones.
• Develop methodologies to consolidate and analyze data from diverse sources, enabling defect mode understanding and yield modeling.
• Transform experimental and manufacturing data into actionable insights that improve yield by leveraging advanced statistics, coding techniques, and engineering expertise.
• Design and implement measurement recipes to deliver quick, precise feedback on product integrity and resolve yield-impacting issues.
• Collaborate with cross-functional teams to debug yield limiters in design, test, and process development areas.
• Develop and harden equipment and methodologies to meet the operational needs of advanced logic nodes.
• Ensure manufacturability by thoroughly analyzing process and spec corners and collaborating with design teams to resolve yield issues prior to manufacturing ramp.
• Execute new product introductions and enable design-technology co-optimization through participation in factory task forces and design of experiments.
• Manage and execute multiple projects simultaneously, meeting tight deadlines without compromising quality.

Skills

Yield development experience

Statistical analysis

Data visualization

Cross-functional collaboration

Education

Bachelor’s degree in Electrical Engineering, Materials Science, Mechanical Engineering, Semiconductor Technology, or related field

Tools

Defect Metrology

Brightfield inspection

E-beam inspection

Job description

Job Details:

Job Description:

The Role and Impact
As a Yield Development Engineer at Intel, you will be at the forefront of advancing semiconductor process technology. Your contributions will directly impact the company’s ability to deliver high-performance, reliable products to the market. This role offers a unique opportunity to influence Intel’s success by driving yield improvements across cutting-edge technology nodes. You will work collaboratively with interdisciplinary teams to solve complex engineering challenges and develop innovative methodologies, ensuring Intel remains an industry leader in the semiconductor landscape.

Key Responsibilities

• Identify root cause yield limiters throughout the lifecycle of a technology node and develop solutions to address them.
• Perform statistical analysis and create visualizations to construct accurate process development roadmaps that drive technology yield milestones.
• Develop methodologies to consolidate and analyze data from diverse sources, enabling defect mode understanding and yield modeling.
• Transform experimental and manufacturing data into actionable insights that improve yield by leveraging advanced statistics, coding techniques, and engineering expertise.
• Design and implement measurement recipes to deliver quick, precise feedback on product integrity and resolve yield-impacting issues.
• Collaborate with cross-functional teams to debug yield limiters in design, test, and process development areas.
• Develop and harden equipment and methodologies to meet the operational needs of advanced logic nodes.
• Ensure manufacturability by thoroughly analyzing process and spec corners and collaborating with design teams to resolve yield issues prior to manufacturing ramp.
• Execute new product introductions and enable design-technology co-optimization through participation in factory task forces and design of experiments.
• Manage and execute multiple projects simultaneously, meeting tight deadlines without compromising quality.

Core Competencies

• Strong record of collaborative success.
• Strong problem-solving and communication skills, with the ability to distill complex technical information for diverse audiences.
• Demonstrated experience in cross-functional teamwork and collaboration.
• Passion for innovation and driving meaningful results in a fast-paced environment.

Qualifications:

The Minimum qualifications are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Materials Science, Mechanical Engineering, Semiconductor Technology, or in a closely related discipline.
  • Bachelor’s degree with 4+ years of experience, Master’s degree with 3+ years of experience, or PhD with 1+ years of experience.
• 2+ years of experience in yield development, process technology, or a related field.
• Experience in statistical analysis and data visualization tools.

Preferred Qualifications

• Technical expertise in semiconductor process development, defect density analysis, and data analytics.
• Experience with advanced semiconductor equipment and methodologies for process improvement.
• Experience within Defect Metrology.
• Experience working with brightfield, darkfield, and ebeam inspection.
• Experience working with semiconductor factories.
• Semiconductor foundry experience.
• Experience with failure analysis.
• Familiarity with machine learning approaches and their application in defect detection and yield modeling.

Join us at Intel to redefine possibilities in semiconductor technology and make a lasting impact.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Arizona, Phoenix

Additional Locations:

US, Oregon, Hillsboro

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $115,110.00-219,550.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.