CPU RTL/AI Micro-Architect - AI Development

Qualcomm

Austin (TX)

On-site

USD 179,000 - 268,400

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

Qualcomm is looking for a professional in Austin, Texas for CPU Engineering to drive innovation with AI-enhanced workflows and high-performance design. The role emphasizes RTL development, integration of AI tools, and collaboration across global teams.

A Bachelor's degree with significant experience in engineering is required. Competitive salary ranges from $179,000 to $268,400, plus bonuses and benefits.

Qualifications

  • 6+ years of experience in Hardware Engineering, Software Engineering, or Electrical Engineering.
  • 5+ years with a Master's degree or 4+ years with a PhD.
  • Strong knowledge of agent-based AI development.

Responsibilities

  • Enhance RTL design productivity using AI.
  • Generate actionable insights for design cycles.
  • Integrate AI capabilities into toolchains.

Skills

AI/LLM-based engineering tools
Verilog/SystemVerilog
Simulation and debug tools

Education

Bachelor's degree in Electrical Engineering or related field
Master's degree in Electrical Engineering or related field
PhD in Electrical Engineering or related field

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group > CPU Engineering

General Summary

Qualcomm is a company of inventors pushing the boundaries of high‑performance compute. Building on a legacy of industry‑leading innovation, we are extending our leadership into the datacenter, delivering next‑generation CPU solutions that combine world‑class performance, power efficiency, and scale.

As AI transforms every layer of computing, Qualcomm is at the forefront of defining how CPUs are designed, optimized, and deployed for AI‑driven and cloud‑scale workloads. Central to this transformation is our investment in advanced design methodologies and AI‑augmented engineering workflows—enabling faster innovation cycles, deeper design insight, and higher‑quality silicon.

We are driving the evolution toward agentic AI‑assisted design, where intelligent tools are embedded across the engineering lifecycle—from architecture exploration to RTL development, analysis, and debug. This approach enhances engineering productivity while preserving the deep expertise and rigor required to deliver industry‑leading CPU designs.

This is the next phase of compute innovation—where high‑performance CPU architecture meets AI‑driven design practices for the datacenter era.

Roles and Responsibilities
  • AI-Enhanced RTL Development & Workflow Innovation
    • Apply and extend existing internal AI tools and agent‑based workflows to enhance RTL design productivity
    • Develop AI‑driven capabilities for:
      • RTL code review and quality analysis (readability, methodology adherence, structural correctness)
      • Spec RTL alignment, ensuring consistency between microarchitecture documentation and implementation
      • Automated debug acceleration, including waveform triage and root‑cause identification
    • Integrate AI into standard RTL development loops rather than creating parallel flows
  • RTL Analysis & Insight Generation
    • Enable AI‑assisted analysis for:
      • Timing, power, and area (PPA) tradeoffs
      • Microarchitectural bottlenecks and inefficiencies
      • Code‑level improvements for maintainability and reuse
    • Develop mechanisms to surface actionable insights early in the design cycle, improving iteration velocity
  • Workflow Integration & Scaling
    • Embed AI capabilities into existing toolchains and methodologies (lint, synthesis, simulation, debug)
    • Collaborate with CAD, DV, and global design teams to scale AI‑enabled workflows across programs and geographies
    • Contribute to cross‑team AI initiatives and working groups to align efforts and maximize reuse of internal capabilities
  • Methodology & Best Practices
    • Evolve RTL methodology by integrating AI‑assisted best practices into:
      • Coding standards and review processes
      • Debug and analysis workflows
      • Documentation and specification alignment
    • Ensure solutions align with Qualcomm’s established RTL principles of readability, maintainability, and cross‑discipline usability
Minimum Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Preferred Qualifications
  • Strong knowledge in AI/LLM‑based engineering tools:
    • Agentic tools (i.e. Codex, Claude Code)
    • Agent‑based AI development (prompting, chaining, orchestration)
  • Solid experience with:
    • Verilog/SystemVerilog (or VHDL) RTL design
    • Simulation, waveform debug, and verification tools
  • Knowledge of CPU Design Techniques:
    • Logic design principles and timing/power implications
    • Low‑power microarchitecture techniques
    • High‑performance design tradeoffs
EEO Statement

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑accomodations@qualcomm.com or call Qualcomm's toll‑free number. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Pay range and Other Compensation & Benefits

$179,000.00 – $268,400.00. This pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. In addition to base salary, Qualcomm offers a competitive annual discretionary bonus program and opportunity for annual RSU grants. The benefits package is designed to support your success at work, at home, and at play.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

CPU Micro-architect/RTL Designer
CPU Micro-architect/RTL Designer

Qualcomm • Austin (TX)

On-site
USD 212,000 - 318,000
CPU Micro-architect/RTL Designer
CPU Micro-architect/RTL Designer

Qualcomm • Santa Clara (CA)

On-site
USD 212,000 - 318,000
CPU RTL LLC Engineer
CPU RTL LLC Engineer

Qualcomm • Santa Clara (CA)

On-site
USD 198,700 - 298,100
AI/ML Logic Design Engineer-Senior
AI/ML Logic Design Engineer-Senior

Qualcomm • Austin (TX)

On-site
USD 127,000 - 191,000
CPU Micro-Architecture and RTL Design Engineer (RISC-V)
CPU Micro-Architecture and RTL Design Engineer (RISC-V)

Qualcomm • Santa Clara (CA)

On-site
USD 167,000 - 251,000
Competitive annual discretionary bonus
Annual RSU grants
Comprehensive benefits package
CPU Micro-architect/RTL Designer
CPU Micro-architect/RTL Designer

Nutanix • Santa Clara (CA)

On-site
USD 212,000 - 318,000
CPU RTL Methodology Engineer
CPU RTL Methodology Engineer

Qualcomm • Austin (TX)

On-site
USD 198,000 - 299,000
Competitive annual discretionary bonus program
Annual RSU grants
Comprehensive benefits package
Staff & Senior Staff Software Engineer, AI Software Platform (Onsite)
Staff & Senior Staff Software Engineer, AI Software Platform (Onsite)

Qualcomm • San Diego (CA)

On-site
USD 158,400 - 237,600
Annual discretionary bonus
Competitive benefits package
Opportunity for RSU grants
VLSI Design Engineer – Server/Data Center & AI IPs
VLSI Design Engineer – Server/Data Center & AI IPs

Qualcomm • Austin (TX)

On-site
USD 140,000 - 210,000
CPU Micro-Architecture and RTL Design Engineer (RISC-V)
CPU Micro-Architecture and RTL Design Engineer (RISC-V)

Qualcomm • Austin (TX)

On-site
USD 167,000 - 251,000
Discretionary bonus program
RSU grants
Comprehensive benefits package