Compiler Engineer - Algorithmic Workloads Compilation

Mythic

Austin (OR)

On-site

USD 120,000 - 150,000

Full time

14 days+

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Benefits offered by this job

Competitive compensation
Equity
Comprehensive benefits package

Job summary

A cutting-edge AI computing firm in Austin is looking for a Compiler Engineer to enhance algorithms for high-performance computing. This role involves developing strategies that unify analog compute with digital systems, requiring expertise in modern C++ and compiler infrastructure. The ideal candidate has a strong background in program analysis and optimization, and thrives in a collaborative environment. Competitive compensation and a supportive culture are offered.

Qualifications

  • 3+ years of professional experience in compilers or high-performance systems software.
  • Hands-on experience developing MLIR or LLVM dialects is a plus.
  • Background in compiler-hardware co-design preferred.

Responsibilities

  • Extend compiler IRs to represent algorithms not easily captured in DNN graphs.
  • Develop compilation strategies for analog compute with digital subsystems.
  • Collaborate with hardware engineers on ISA and feature improvements.

Skills

Proficiency in modern C++ (C++14/17/20)
Experience in compilers or high-performance systems software
Familiarity with compiler IRs (e.g., MLIR, LLVM)
Solid foundation in program analysis and optimization techniques

Job description

Compiler Engineer - Algorithmic Workloads Compilation

Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.

We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.

About The Role

Here's What You Will Do

  • Extend compiler IRs to represent algorithms not easily captured in DNN graphs including control flow and iterative computation
  • Develop compilation strategies that unify analog compute with digital subsystems while maintaining performance and correctness
  • Prototype and optimize algorithms with irregular or dynamic control flow in compiler IRs, applying techniques such as vectorization, predication, and scheduling
  • Collaborate with hardware engineers to co-design ISA and features that improve support for algorithmic workloads
  • Define a roadmap for higher-level programming abstractions that simplify prototyping and accelerate deployment

Here's the background we hope you will have

  • 3+ years of professional experience in compilers or high-performance systems software
  • Proficiency in modern C++ (C++14/17/20) and Python
  • Familiarity with compiler IRs (e.g., MLIR, LLVM, or equivalent) and their use representing complex program structures
  • Solid foundation in program analysis and optimization techniques (e.g., SSA form, loop optimizations, vectorization)

The following would be nice to have, but is not required

  • Hands-on experience developing MLIR or LLVM dialects for control flow (e.g. scf, cf) or affine/polyhedral representations.
  • Background in compiler-hardware co-design: working with hardware designers to refine ISA or execution models for efficiency
  • Proven ability to prototype irregular or control-flow algorithms in compiler IRs and optimize them for performance and resource constraints
  • Experience extending ML compiler stacks (ONNX, IREE, XLA, PyTorch, TVM) to support workloads beyond DNNs

What We Offer

  • The opportunity to make algorithmic and control-flow-heavy workloads practical on novel accelerator hardware.
  • A role that bridges compiler design and hardware co-design, shaping both the IR and the accelerator architecture.
  • A collaborative, innovative team that values engineering rigor, continuous integration, and user-focused design.
  • Competitive compensation, equity, and benefits package.

At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.

Mythic is an equal opportunities employer and welcomes applications from diverse candidates.

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