Compiler Engineer

Oho Group; San Francisco (CA); On-site; USD 180,000 - 250,000; Full time

Job summary

Oho Group is building an AI software stack and compiler infrastructure in San Francisco. This role sits at the crossroads of compiler optimization and hardware mapping, transforming models and graphs into efficient programs for a new accelerator architecture.

You will own optimization passes, contribute to MLIR-based pipelines, and work with architecture, code-generation and runtime teams to push performance of AI workloads on modern GPUs and accelerators.

Qualifications

• Proficient in C++ and compiler engineering.
• Hands-on experience with LLVM, MLIR or similar infrastructure.
• Experience with graph optimization and IR transformations.
• Ability to reason across compiler decisions and hardware behavior.

Responsibilities

• Design graph and IR-level compiler optimizations.
• Develop transformation, fusion, scheduling and memory-planning passes.
• Lower workloads through MLIR-based compilation pipelines.
• Optimize data movement, parallelism and accelerator utilization.
• Analyze generated programs and eliminate performance bottlenecks.
• Collaborate with architecture, code-generation and runtime engineers.
• Help define how ML workloads should map onto the underlying hardware.

Skills

C++

Compiler engineering

LLVM/MLIR

Graph optimization

Tools

LLVM

MLIR

Job description

We’re working with an AI software company building a new compiler and software stack for high-performance accelerated computing.

This role sits in the middle of the compiler, transforming models and computational graphs into efficient programs for a new accelerator architecture. You’ll own optimizations that materially affect workload performance rather than maintaining an established toolchain.

What you’ll work on

• Design graph and IR-level compiler optimizations
• Develop transformation, fusion, scheduling and memory-planning passes
• Lower workloads through MLIR-based compilation pipelines
• Optimize data movement, parallelism and accelerator utilization
• Analyze generated programs and eliminate performance bottlenecks
• Collaborate with architecture, code-generation and runtime engineers
• Help define how ML workloads should map onto the underlying hardware

What we’re looking for

• Strong C++ and compiler engineering experience
• Hands‑on knowledge of LLVM, MLIR or comparable compiler infrastructure
• Experience with graph optimization, IR transformations or lowering
• Ability to reason across compiler decisions and hardware behavior

Experience with PyTorch compilation, Triton, GPUs, AI accelerators, memory optimization or hardware/software co-design would be particularly valuable.

This is an opportunity to shape a compiler while both the software stack and target architecture are still evolving.