CMP Process Engineer

Samsung Austin Semiconductor, LLC.

Taylor (TX)

On-site

USD 106,000 - 145,000

Full time

3 days ago
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Benefits offered by this job

Medical, dental, and vision insurance
Life insurance & 401(k) matching
Onsite cafés & fitness facilities
Maternity & paternity leave
PTO + holidays
Wellness incentives
MBO bonuses

Job summary

Samsung Austin Semiconductor is seeking a CMP Process Engineer to own critical planarization steps in a high-volume fab. You will control removal rate, optimize recipes, and manage defects to ensure wafer flatness and yield.

Experience with CMP tools and metrology, plus DOE for process optimization, is required. Join a team that analyzes materials, implements process improvements, and collaborates across fabs.

Qualifications

  • Basic requirement BS or MS in Chemical, Mechanical, Electrical, or Industrial Engineering, Physics, Chemistry, Material Science, or Computer Science.
  • A minimum 5 years of related experience; Semiconductor Process Flows.
  • Previous experience in a high-volume semiconductor manufacturing environment desired.
  • Applicable manufacturing experience in other industries can be considered.
  • Basic CMP Knowledge: Understanding of dielectric and metal CMP fundamentals, including slurry-pad-conditioning interactions and post-clean steps.
  • Prefer to have some level of Equipment Familiarities: Hands‑on experience with major industry CMP tools: AMAT/EBara and their end point systems.
  • Data & Statistics: Proficiency in Statistical Process Control (SPC), Fault Detection and Classification (FDC), and analysis software like JMP or Spotfire.
  • Problem Solving: Ability to drive root‑cause analysis using methodologies like FMEA, 8D, and first‑principles physics approaches.
  • Flexibility: As per business needs, sometimes it is required to work during off‑hour times and/or with CWW shift schedule.
  • Familiar with Metrology Tools: Ellipsometry, SEM, and AFM for thickness and roughness check.
  • Experience on Defect Reduction: Experience identifying killer defects and improving wafer yield.
  • Basic Idea of Fab Integration: Understanding of how CMP affects following steps (Etch/Photo) and overall yield.
  • DOE: Ability to run structured Design of Experiments for process optimization.

Responsibilities

  • Removal Rate (RR) control: evaluating factors to ensure thickness consistency across wafers.
  • Condition optimization: determining optimal process conditions to improve uniformity and resolve issues.
  • Recipe management: developing and optimizing Recipe parameters to improve flatness.
  • Defect & uniformity management: improving wafer uniformity and resolving defects.
  • Consumable life cycle management: monitoring usage cycles of pads and slurry to stay within specs.
  • Material evaluation: assessing slurries and polishing pads to optimize CMP.

Skills

Statistical Process Control (SPC)
Fault Detection and Classification (FD

Education

BS/MS in Chemical/Mechanical/Electrical/Industrial Engineering or Physical Sciences

Tools

AMAT/EBara CMP tools
End point systems
Ellipsometry
SEM
AFM

Job description

About Samsung Austin Semiconductor

Samsung is a world leader in advanced semiconductor technology, founded on the belief that the pursuit of excellence creates a better world. At Samsung Austin Semiconductor, we are Innovating Today to Power the Devices of Tomorrow. Come innovate with us!

Position Summary

A CMP (Chemical Mechanical Polishing) Process Engineer is responsible for the critical semiconductor manufacturing step of planarizing the wafer surface. This is achieved through a synergistic combination of chemical reactions and mechanical force, ensuring that subsequent layers of the chip can be built with high precision. The primary goal of a CMP engineer is to achieve a flat wafer surface by controlling the chemical reaction and mechanical force.

Role and Responsibilities

Here’s What You’ll Be Responsible For:

  • Removal Rate (RR) Control: Conducting performance evaluations of various influence factors to ensure the thickness skew before and after CMP is consistent across the entire wafer.
  • Condition Optimization: Determining the optimal process conditions to improve uniformity and resolve chronic issues, such as "center low RR profiles.
  • Recipe Management: Developing and optimizing Recipe (RCP) parameters and improve flatness.
  • Defect & uniformity Management: Managing and improving wafer uniformity and resolving defects such as scratches and particles.
  • Consumable Life Cycle Management: Monitoring the usage cycles of consumables (pads, slurry) to ensure they do not exceed specifications, which could impact quality.
  • Material Evaluation: Evaluating the performance of different slurries and polishing pads to optimize the CMP process.
Skills and Qualifications

Here’s What You’ll Need:

  • Basic requirement BS or MS in Chemical, Mechanical, Electrical, or Industrial Engineering, Physics, Chemistry, Material Science, or Computer Science.
  • A minimum 5 years of related experience; Semiconductor Process Flows.
  • Previous experience in a high-volume semiconductor manufacturing environment desired.
  • Applicable manufacturing experience in other industries can be considered.
  • Basic CMP Knowledge: Understanding of dielectric and metal CMP fundamentals, including slurry-pad-conditioning interactions and post-clean steps.
  • Prefer to have some level of Equipment Familiarities: Hands‑on experience with major industry CMP tools: AMAT/EBara and their end point systems.
  • Data & Statistics: Proficiency in Statistical Process Control (SPC), Fault Detection and Classification (FDC), and analysis software like JMP or Spotfire.
  • Problem Solving: Ability to drive root‑cause analysis using methodologies like FMEA, 8D, and first‑principles physics approaches.
  • Flexibility: As per business needs, sometimes it is required to work during off‑hour times and/or with CWW shift schedule.
  • Preferred Qualifications
  • Familiar with Metrology Tools: Experience with Ellipsometry, SEM, and AFM for thickness and roughness check.
  • Experience on Defect Reduction: Experience identifying killer defects and improving wafer yield.
  • Basic Idea of Fab Integration: Understanding of how CMP affects following steps (Etch/Photo) and overall yield.
  • DOE: Ability to run structured Design of Experiments for process optimization.

The current base salary range for this role is between $106,000 - $145,000. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience. Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance. This position may include access to controlled information or technology under U.S. export control laws. Employment may be contingent on either the applicant verifying that the applicant falls under the “U.S. Person” definition (including U.S. citizens, U.S. lawful permanent residents, and those granted U.S. asylum or refugee status) or the employer timely obtaining any necessary export license under federal law. The employer evaluates export licensing on a case‑by‑case basis and may decline to proceed with a job applicant in its sole discretion, as export license applications can take many weeks to process.

Total Rewards

At Samsung Austin Semiconductor, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location. We offer a comprehensive benefits package, including:

  • Medical, dental, and vision insurance
  • Life insurance and 401(k) matching with immediate vesting
  • Onsite café(s) and workout facilities
  • Paid maternity and paternity leave
  • Paid time off (PTO) + 2 personal holidays and 10 regular holidays
  • Wellness incentives and MORE
  • Eligible full‑time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.

All positions at Samsung Austin Semiconductor are full‑time on‑site.

Trade Secrets

By submitting an application, you agree not to disclose to Samsung or induce or encourage Samsung to use any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.

* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page.

* Samsung Electronics America, Inc. and its subsidiaries are committed to Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

Samsung Electronics is a global leader in technology, opening new possibilities for people everywhere. Through relentless innovation and discovery, we are transforming the worlds of TVs, smartphones, wearable devices, tablets, digital appliances, and network systems, and the entire semiconductor industry with our memory, system LSI, foundry, and LED solutions. Samsung is also leading in the development of the Internet of Things through, among others, our Smart Home and Digital Health initiatives. Since being established in 1969, Samsung Electronics has grown into one of the world’s leading technology companies, and become recognized as one of the top global brands. Our network now extends across the world, and Samsung takes great pride in the creativity and diversity of its talented people, who drive our growth. To discover more, please visit our official newsroom at https://news.samsung.com/global/.

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