Cellular SOC Design Verification Engineer - Entry Level

Apple; Sunnyvale (CA); On-site; USD 121,000 - 184,000; Full time

Job summary

An innovative firm is seeking a passionate Design Verification Engineer to join their cutting-edge Silicon Engineering Group. This entry-level position offers a unique opportunity to engage in the verification of state-of-the-art Cellular SoCs. You'll be involved in crafting complex verification test benches, implementing best-in-class methodologies, and collaborating with product development teams to push the boundaries of cellular technology. This role promises a dynamic environment where your contributions will enhance the product experience for customers globally. If you are eager to tackle diverse challenges and grow your skills in a collaborative setting, this position is perfect for you.

Qualifications

• Understanding of large scale SOC design and verification test benches.
• Knowledge of Cellular protocol and multi-chip SOC debug architecture.

Responsibilities

• Contribute to the verification effort of complex SOCs delivering Cellular solutions.
• Craft reusable UVM based test benches and implement directed test suites.

Skills

Object Oriented Programming

Communication Skills

Problem-Solving Skills

Programming in SystemVerilog

Programming in Python

Programming in C++

Education

BSEE or BSCS

MSEE or MSCS

Job description

Cellular SOC Design Verification Engineer - Entry Level

Do you have a passion for invention and self-challenge? This position gives you an opportunity to be a part of one of the most cutting edge and key projects that Apple’s Silicon Engineering Group has embarked upon to-date. As a Design Verification Engineer on our team, you'll be at the center of the verification effort within our silicon design group responsible for crafting and productizing state-of-the-art Cellular SoCs! You will have the opportunity to contribute to the verification effort of a set of complex SOCs delivering the Cellular solution. You will integrate multiple sophisticated IP level DV environments, craft highly reusable best-in-class UVM based test bench, implement effective coverage driven and directed test suites, deploy new tools and methodologies to deliver chips that are right-first-time. By collaborating with other product development groups across Apple, you can push the industry boundaries of what cellular systems can do and improve the product experience for our customers across the world!

Description

Through this experience, you will learn all aspects of a large scale SOC design, Complex verification test benches, different types of SOC architectures, multiple high speed protocols, industry-standard low power architecture, best in class DV methodology, verification on accelerated platforms, knowledge on Cellular protocol, FW- HW interactions, complexities of multi-chip SOC debug architecture, etc.

Minimum Qualifications

1. BSEE or BSCS is required.
2. Object Oriented Programming.
3. Coursework in Digital Design.

Preferred Qualifications

1. MSEE, MSCS or beyond is preferred.
2. Coursework in Computer Architecture, Networking Protocol.
3. Should be a great teammate with excellent communication and problem-solving skills and the desire to seek diverse challenges.
4. Programming experience in SystemVerilog, Python, C++.

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $121,900 and $183,600, and your base pay will depend on your skills, qualifications, experience, and location.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.