ASIC Verification Engineer

NVIDIA Gruppe; Austin (TX); On-site; USD 116,000 - 189,750; Full time

Job summary

NVIDIA Gruppe is seeking an ASIC Verification Engineer to verify global IP and enhance various products including AI and HPC. In this role, you'll develop verification test plans and collaborate with multiple teams to ensure functional correctness and performance.

The ideal candidate has at least 2 years of design verification experience, proficiency in UVM and SystemVerilog, and excellent debugging skills. This position offers a competitive salary between $116,000 and $189,750, plus equity and benefits.

Qualifications

• 2+ years of proven design verification experience.
• Experience in pre-silicon verification (UVM, SystemVerilog).
• Excellent debugging and analytical skills.

Responsibilities

• Develop test plans and verification infrastructure for global IP verification.
• Collaborate with design teams to find corner cases and resolve verification issues.
• Drive coverage-based verification closure.

Skills

Design verification

SystemVerilog

UVM

Perl

Python

Debugging

Communication

Education

BS/MS in Electrical or Computer Engineering

Tools

dc_shell

VCS

Debussy

Job description

NVIDIA is looking for an ASIC Verification Engineer to help verify our global IP and impact a variety of products across consumer graphics, self-driving cars, HPC, cloud computing, and AI.

In this role, you will partner with design, architecture, verification and integration teams to make implementation choices, craft and implement verification test plans, maintain regressions, close coverage and sign off on functional correctness and performance expectations.

What You'll Be Doing

• Develop test plans, tests and verification infrastructure for verifying global IP across multiple products
• Define, develop, and automate flows and methodologies to efficiently build, deploy, and verify generated RTL
• Ensure code and functional coverage of all the RTL you will verify
• Build verification components using SV/UVM methodology
• Drive coverage-based verification closure
• Collaborate with design teams across NVIDIA to find corner cases and resolve verification related issues

What We Need to See

• BS/MS in Electrical or Computer Engineering (or equivalent experience)
• 2+ years of proven design verification experience
• Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design/implementation flow, and design automation
• Programming and scripting experience in Perl or Python
• Excellent debugging and analytical skills
• Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)
• Strong communication and collaboration skills to interact within the team and across functional teams

Ways to Stand Out

• Previous experience automating tasks in the design verification process
• Hands-on experience in object-oriented programming
• Prior design or verification experience at the IP or block level
• Experience developing methodologies used by others
• Demonstrated ability to drive a project to completion

Base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD – 189,750 USD. You will also be eligible for equity and benefits.

Applications for this job will be accepted until May 24, 2026.

We are committed to fostering a diverse work environment and are proud to be an equal-opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.