ASIC Physical Design Engineer - Floorplanning & Power

Renesas Electronics Corporation; Austin (TX); Híbrido; USD 110.000 - 170.000; Jornada completa

Descripción de la vacante

Renesas Electronics Corporation in Austin, TX, is seeking a Physical Design Engineer to join the Analog Backend team, focusing on digital island implementation inside analog chips. You will implement ASIC physical design flow: floorplanning, placement optimization, CTS, routing, and physical verification, while optimizing for performance, reliability and manufacturability.

Collaborate with global teams of analog designers and verification engineers to address power integrity and mixed-signal

Formación

• Experience in ASIC Physical Design.
• Knowledge of floorplanning, placement, CTS, routing, and sign-off checks.
• Power integrity analysis knowledge (IR drop, electromigration).
• Team player with international collaboration experience.
• Analog Layout experience is a plus.

Responsabilidades

• Implement ASIC physical design flow including floorplanning, placement optimization, CTS, routing and physical verification.
• Optimize designs for performance, reliability and manufacturability.
• Perform chip-level power integrity analysis across multiple voltage domains.
• Work on digital implementation embedded in analog environments.
• Collaborate with global cross-functional teams including analog designers and verification engineers.

Conocimientos

ASIC Physical Design

Floorplanning

Placement

CTS

Power Integrity

Collaboration

Descripción del empleo

Job Description

We are looking for a Physical Design Engineer to join our Analog Backend team and work on the digital island implementation within our analog chips. This role is ideal for someone who enjoys solving complex physical design challenges in mixed-signal environments.

What You’ll Do

• Implement key aspects of the ASIC physical design flow, including floorplanning, placement optimization, clock tree synthesis, routing, and physical verification
• Optimize designs for performance, reliability, and manufacturability
• Perform chip-level power integrity analysis across multiple voltage domains (IR drop, signal EM, and power EM)
• Work on digital implementation embedded in analog environments
• Collaborate with global cross-functional teams including analog designers and verification engineers

Qualifications

• Experience in ASIC Physical Design
• Strong understanding of floorplanning, placement, CTS, routing, and sign-off checks
• Knowledge of power integrity analysis (IR drop and electromigration)
• A team player who enjoys working in an international, collaborative environment
• Analog Layout experience is a plus

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read ourDiversity & Inclusion Statement.

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.