ASIC DFT Engineer I (Full Time) - United States

Cisco; Allentown (Lehigh County); On-site; USD 95,000 - 157,000; Full time

Job summary

Cisco Systems is seeking an ASIC Design for Test Engineer to join the Silicon One team. You’ll drive design-for-test features and collaborate across RTL, physical design, and verification to ensure robust test solutions for next‑generation silicon.

Role emphasizes Python scripting, SystemVerilog validation, ATPG/EDA tool usage, and early DFT involvement in the design cycle. A strong foundation in JTAG and BIST is valued.

Qualifications

• Bachelor's degree in ASIC DFT or related field.
• Foundational understanding or exposure to JTAG, scan architectures, and BIST.
• Familiarity with EDA/ATPG tools and scripting (Python/Tcl/Perl).
• Experience with gate-level simulations and VCS debugging.
• Strong verification coursework including SystemVerilog and timing concepts.

Responsibilities

• Implement DFT features for ATE, in-system test, debug and diagnostics.
• Create and enhance automation scripts to improve robustness and efficiency.
• Collaborate with frontend RTL, backend PD, and verification teams to integrate test logic.
• Validate test timing and logical equivalency of designs using SystemVerilog.

Skills

ASIC DFT

JTAG familiarity

Python scripting

SystemVerilog

ATPG/EDA tools

Education

Bachelor's degree in ASIC/related field

Tools

TestMax

Tetramax

Tessent

PrimeTime

Job description

Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens.

Applications are accepted until further notice.

Meet the Team

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Your Impact

You will be in the Silicon One development organization as an ASIC Design for Test Engineer with a primary focus on Design-for-Test. You will work with frontend RTL teams, backend Physical Design teams to understand chip architecture and drive DFT requirements early in the design cycle. You will:

• Implement the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics needs of the designs.
• Create and enhance automation scripts to improve implementation robustness and efficiency.
• Work closely with the Design, Design Verification, and Physical Design teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows.
• Collaborate with team members to validate test timing and logic equivalency of designs using SystemVerilog.
• Utilize ATPG and EDA tools (TestMax, Tetramax, Tessent, PrimeTime) for test pattern generation and analysis.

Minimum Qualifications

• A Bachelor's degree (completed within the past 3 years or expected to be completed within the next 12 months).
• Qualifying education should be in ASIC DFT or a related field.
• Foundational understanding or academic/internship exposure to JTAG protocols, scan architectures, and BIST (Built-In Self-Test, including memory BIST and boundary scan).
• Familiarity or introductory hands-on exposure to EDA and ATPG tools along with scripting or coding skills in Python, Tcl, or Perl.
• Experience working with gate-level simulations and debugging using simulators like VCS.

Preferred Qualifications

• Practical experience or strong coursework in verification skills, including SystemVerilog, logic equivalency checking, and test-timing validation.
• Understanding of basic VLSI circuit physical behaviors in silicon (such as electromigration and temperature/voltage variation effects) and familiarity with basic timing concepts (setup/hold times, metastability).
• Exposure to post-silicon validation using DFT patterns and Test Static Timing Analysis.
• Strong verbal and written communication skills to collaborate effectively with frontend RTL, backend physical design, and verification teams.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
• 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
• Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
• Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
• 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
• Additional paid time away may be requested to deal with critical or emergency issues for family members
• Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

• .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
• 1.5% of incentive target for each 1% of attainment between 50% and 75%;
• 1% of incentive target for each 1% of attainment between 75% and 100%; and
• Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$107,800.00 - $157,400.00

Non-Metro New York state & Washington state:

$94,800.00 - $140,000.00

• For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.