AMS Verification Engineer (RFIC Engineering)

InvestedintheMission; Redmond (WA); On-site; USD 125,000 - 200,000; Full time

Benefits offered by this job

Stock options

Bonuses

Medical, vision and dental coverage

401(k) retirement plan

Disability insurance

Paid parental leave

3 weeks paid vacation

10+ paid holidays per year

Shuttle to SpaceX Redmond office

Job summary

SpaceX is seeking an AMS Verification Engineer (Silicon Engineering) to develop and own full‑chip analog/digital verification flows for RFICs and RF‑SoCs used in Starlink. You’ll create testbenches, improve simulation accuracy with designers, and collaborate with systems, firmware, and ASIC teams across global space and ground infrastructure.

We value experience with AMS tools, SystemVerilog/UVM, Python, and Verilog‑A/AMS modeling.

Qualifications

• Bachelor’s degree in an engineering discipline.
• 1+ years of IC design/verification experience.
• Master’s degree or PhD in engineering with emphasis in IC design/verification (preferred).
• Experience with AMS simulation tools and flows.
• Experience with annotated gate-level simulation within an AMS simulator.
• SystemVerilog, UVM, Python experience.
• Behavioral models for analog/mixed‑mode IPs in Verilog‑A/AMS.
• Understanding of analog circuit fundamentals and RF/analog IPs.
• Understanding of RTL and gate‑level netlists.
• Ability to work long hours and weekends as necessary.

Responsibilities

• Develop and own analog-on-top and digital-on-top verification flows for full-chip simulations of in-house RFICs and RF-SoCs.
• Develop testbenches and flows to simulate critical interfaces between RFICs/SoCs.
• Work with designers to improve speed/accuracy of simulations for mixed-signal IPs (PLLs, DACs, ADCs).
• Create behavioral models of RF/analog/mixed-mode blocks and use them in chip verification.
• Coordinate with ATE test engineering to develop test plans.
• Set up and run EM/IR simulations.

Skills

AMS verification

Analog/mixed-signal understanding

RTL and gate-level netlists

Cross-disciplinary collaboration

Education

Bachelor’s degree in engineering

Master’s degree or PhD in engineering

Tools

SystemVerilog

UVM

Python

AMS simulation tools

Verilog‑A/AMS

Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

AMS VERIFICATION ENGINEER (SILICON ENGINEERING)

At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best‑in‑class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious AMS Verification Engineer who will work alongside world‑class cross‑disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting‑edge next‑generation RFICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Join us to help deliver cutting‑edge solutions that will expand the performance and capabilities of the Starlink network.

RESPONSIBILITIES:

• Develop and own “analog-on-top” and “digital-on-top” design verification flows for full-chip simulations of in-house RFICs and RF-SoCs
• Develop testbenches and flows to simulate critical interfaces between RFICs/SoCs
• Work with designers to improve speed/accuracy of simulations for advanced mixed-signal IPs (PLLs, DACs, ADCs, etc.)
• Work with designers to create behavioral models of RF/analog/mixed-mode circuit blocks, and employ these models in chip verification
• Work with ATE test engineering team to develop and prototype testplans
• Setup and run EM/IR simulations

BASIC QUALIFICATIONS:

• Bachelor’s degree in an engineering discipline
• 1+ years of research and/or industry experience in the field of integrated circuit design/verification

PREFERRED SKILLS AND EXPERIENCE:

• Master’s degree or PhD in an engineering discipline with emphasis in integrated circuit design/verification
• Experience with AMS simulation tools and flows
• Experience with annotated gate-level simulation within an AMS simulator
• Experience in System‑Verilog, UVM, Python
• Experience in writing behavioral models for analog/mixed‑mode IPs in Verilog‑A/AMS
• Understanding of analog circuit fundamentals, and experience simulating circuits such as LDOs, bandgaps, DACs, ADCs, baseband amplifiers, mixers, RF amplifiers, oscillators, PLLs, etc.
• Understanding of combinational logic and basic digital circuit blocks, such as flip‑flops, counters, buffers, synchronizers, serializers/de‑serializers, etc.; ability to understand RTL and gate‑level netlists

ADDITIONAL REQUIREMENTS:

• Ability to work long hours and weekends as necessary to support critical milestones

COMPENSATION AND BENEFITS:

Pay Range:
Level 1: $125,000.00 - $165,000.00
Level 2: $145,000.00 - $200,000.00

Your actual level and base salary will be determined on a case‑by‑case basis and may vary based on the following considerations: job‑related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long‑term incentives, in the form of company stock or long‑term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long‑term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees in Washington State accrue paid sick time in compliance with state and federal law. Company shuttles are offered to employees for roundtrip travel from select Seattle locations to the SpaceX Redmond office Monday to Friday.

ITAR REQUIREMENTS:

• To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX’s affirmative action plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to [e-mail].