AMS Verification Engineer (RFIC Engineering)

United States Digital Space LLC; Redmond (WA); On-site; USD 125,000 - 200,000; Full time

Benefits offered by this job

Stock options

Long-term incentives

Bonuses

401(k) retirement plan

Medical, vision, dental

3 weeks paid vacation

10+ paid holidays

Paid sick time

Shuttle service Seattle-Redmond

Job summary

United States Digital Space LLC in Redmond, WA is seeking an AMS Verification Engineer to advance next-generation RFICs for Starlink. You will collaborate with cross-functional teams to verify full-chip RFICs and RF-SoCs, develop testbenches, and optimize simulation accuracy.

The role requires a Bachelor's in engineering and 1+ years in IC design/verification; Master’s/PhD and experience with SystemVerilog/UVM, Python, and Verilog-A/AMS are preferred.

Qualifications

• Bachelor's degree in engineering mandatory.
• 1+ years in IC design/verification.
• Masters/PhD in engineering preferred.
• Experience with AMS simulation tools and flows.
• System-Verilog, UVM, Python experience.
• Verilog-A/AMS behavioral modeling.
• Analog/mixed-signal circuit understanding (LDOs, PLLs, DACs/ADC) preferred.
• RTL and gate-level netlists understanding.

Responsibilities

• Develop analog-on-top and digital-on-top verification flows for full-chip simulations.
• Create testbenches for RFICs/SoCs interfaces.
• Improve speed/accuracy of simulations for mixed-signal IPs.
• Model RF/analog blocks in Verilog-A/AMS and use in verification.
• Coordinate with ATE test engineers to develop test plans.
• Set up and run EM/IR simulations.

Skills

AMS verification

SystemVerilog/UVM

Python

Verilog-A/AMS

Analog/mixed-signal

RTL/gate-level

Education

Bachelor's degree in engineering

Master's/PhD in engineering

Tools

AMS simulators

Job description

the company was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today the company is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

AMS VERIFICATION ENGINEER (SILICON ENGINEERING)

At the company we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious AMS Verification Engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation RFICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Join us to help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.

RESPONSIBILITIES:

• Develop and own "analog-on-top" and "digital-on-top" design verification flows for full-chip simulations of in-house RFICs and RF-SoCs
• Develop testbenches and flows to simulate critical interfaces between RFICs/SoCs
• Work with designers to improve speed/accuracy of simulations for advanced mixed-signal IPs (PLLs, DACs, ADCs, etc.)
• Work with designers to create behavioral models of RF/analog/mixed-mode circuit blocks, and employ these models in chip verification
• Work with ATE test engineering team to develop and prototype testplans
• Setup and run EM/IR simulations

BASIC QUALIFICATIONS:

• Bachelor's degree in an engineering discipline
• 1+ years of research and/or industry experience in the field of integrated circuit design/verification

PREFERRED SKILLS AND EXPERIENCE:

• Master's degree or PhD in an engineering discipline with emphasis in integrated circuit design/verification
• Experience with AMS simulation tools and flows
• Experience with annotated gate-level simulation within an AMS simulator
• Experience in System-Verilog, UVM, Python
• Experience in writing behavioral models for analog/mixed-mode IPs in Verilog-A/AMS
• Understanding of analog circuit fundamentals, and experience simulating circuits such as LDOs, bandgaps, DACs, ADCs, baseband amplifiers, mixers, RF amplifiers, oscillators, PLLs, etc.
• Understanding of combinational logic and basic digital circuit blocks, such as flip-flops, counters, buffers, synchronizers, serializers/de-serializers, etc.; ability to understand RTL and gate-level netlists

ADDITIONAL REQUIREMENTS:

• Ability to work long hours and weekends as necessary to support critical milestones

COMPENSATION AND BENEFITS:

Pay Range:Level 1: $125,000.00 - $165,000.00Level 2: $145,000.00 - $200,000.00

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at the company. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees in Washington State accrue paid sick time in compliance with state and federal law. Company shuttles are offered to employees for roundtrip travel from select Seattle locations to the the company Redmond office Monday to Friday.

ITAR REQUIREMENTS:

• To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

the company is an Equal Opportunity Employer; employment with the company is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

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