AI Kernel Engineer - Build High-Performance AI Primitives

Majestic Labs ai; Los Altos (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Majestic Labs is an AI startup building next-generation infrastructure for demanding AI workloads in the US. We design high-performance compute kernels and optimize for throughput and latency across heterogeneous units, collaborating with Triton and PyTorch teams.

You will prototype precision formats and contribute to hardware-software co-design. We value curiosity, collaboration, and relentless problem-solving.

Qualifications

• Degree in CS, computer engineering or related field.
• Strong background in parallel programming (CUDA/Triton/RISCV Vector/OpenMP).
• Deep understanding of memory layout, vectorization and cache behavior.
• Experience with wide-SIMD units and matrix/systolic engines.
• Familiarity with BLAS/BLIS and dense linear algebra.
• Experience with performance analysis and parallel debugging (GDB/Nsight).
• Hands-on profiling/optimizing compute/AI workloads (GEMM/softmax/attention).
• Proficiency in C++17+ with standard templates/algorithms.

Responsibilities

• Design and implement high-performance compute kernels for AI primitives such as GEMM, attention, normalization, and convolution.
• Optimize for throughput, latency, and memory hierarchy across heterogeneous compute units (SIMD, matrix engines, DMA).
• Collaborate with compiler and runtime teams to integrate kernels into Triton and PyTorch pipelines.
• Profile and tune kernels using tools like Perfetto, VTune, Nsight, or custom simulators.
• Prototype and evaluate precision formats (FP16/BF16/FP8/e5m2, MXFP/FP4, etc.).
• Contribute to micro-architecture feedback loops, helping co-design ISA and memory features with the hardware team.

Skills

CUDA

Triton

RISC-V Vector

OpenMP

GEMM

Education

CS degree

Tools

Nsight

GDB

LLVM/MLIR

Job description

Majestic Labs is an AI startup building next-generation infrastructure for demanding AI workloads in the US. We design high-performance compute kernels and optimize for throughput and latency across heterogeneous units, collaborating with Triton and PyTorch teams.

You will prototype precision formats and contribute to hardware-software co-design. We value curiosity, collaboration, and relentless problem-solving.