AI-Driven Functional Verification Engineer – Pre-Silicon

Cadence Design Systems; San Jose (CA); On-site; USD 154,000 - 286,000; Full time

Benefits offered by this job

Paid vacation

401(k) plan with employer match

Employee stock purchase plan

Medical, dental, and vision plans

Job summary

A leading technology company based in San Jose, California is seeking a Pre-Silicon Verification Engineer with expertise in functional verification and a passion for AI. This role involves leveraging advanced machine learning techniques to redefine verification methodologies. The ideal candidate will have a strong programming background and extensive experience in ASIC verification processes. Cadence offers a collaborative environment and values innovation, providing a competitive annual salary based on qualifications and experience.

Qualifications

• Experience in pre-silicon ASIC verification methodologies.
• Skills in using simulation analysis tools for debugging.
• Knowledge of the latest ML technologies like LLMs.

Responsibilities

• Contribute to machine learning in verification methodologies.
• Develop agentic AI solutions using ML technologies.
• Collaborate with machine learning teams on verification processes.

Skills

Formal verification

UVM Verification

Programming in Verilog

System Verilog

Python

Education

BS with 10+ years, MS with 7+ years, or PhD with 5+ years

Tools

Jasper

Xcelium

IMC

Job description

A leading technology company based in San Jose, California is seeking a Pre-Silicon Verification Engineer with expertise in functional verification and a passion for AI. This role involves leveraging advanced machine learning techniques to redefine verification methodologies. The ideal candidate will have a strong programming background and extensive experience in ASIC verification processes. Cadence offers a collaborative environment and values innovation, providing a competitive annual salary based on qualifications and experience.