Advanced Technology: Compiler Engineer

Cerebras Systems; Sunnyvale (CA); On-site; USD 120,000 - 160,000; Full time

Job summary

Cerebras Systems is seeking Compiler Engineers to join their Advanced Technology Group.

The role involves working on the Tungsten compiler, developing its toolchain for efficient execution across wafer-scale architectures. Candidates should have substantial experience in compiler development, a strong grasp of computer architecture, and great communication skills. A PhD in Computer Science or Computer Engineering is preferred, or equivalent experience.

Qualifications

• PhD in Computer Science or a related field is preferred.
• Strong experience in compiler development on novel architectures.
• Excellent understanding of computer architecture and performance constraints.

Responsibilities

• Design and implement compiler passes for the Tungsten toolchain.
• Develop strategies for code generation focused on AI workloads.
• Collaborate with ASIC architects on hardware-software co-design.

Skills

Compiler development

IR design

C programming

Computer architecture

Performance optimization

Education

PhD in Computer Science or Computer Engineering

Tools

MLIR

XLA

TVM

Job description

About The Team

Cerebras builds wafer-scale AI processors—single chips delivering tens of PB/s of memory bandwidth and a dataflow architecture that accelerates at a granularity no multi-device system can match. The Advanced Technology Group (ATG) is Cerebras’ pathfinding organization. We work ahead of product to explore new architectures, demonstrate breakthrough performance on scientific and AI workloads, and shape the technical roadmap for future Cerebras hardware and software. Our work regularly appears at top-tier venues (Supercomputing, SIAM, IEEE, and NeurIPS) and directly influences the design of next-generation wafer-scale systems.

About The Role

We are seeking Compiler Engineers to join a small team of specialists working on our emerging Tungsten language compiler. Tungsten is Cerebras’ dataflow programming language, purpose-built for wafer-scale hardware. You will work on the Tungsten compiler from language design through code generation, building the toolchain that translates high-level intent into efficient execution across hundreds of thousands of cores with a memory and interconnect model unlike anything in conventional computing.

This is not incremental work on an existing backend. The architecture is new, the programming model is new, and the compiler is where those two things meet. You will collaborate closely with Cerebras’ ASIC, kernel, and AI teams, and your design decisions will directly shape both the language and the hardware it targets. Beyond the compiler itself, the broader toolchain—runtime, debugger, simulator—is still being built, and we are equally interested in engineers who want to own those pieces of the developer experience on novel hardware.

What You Will Do

• Design and implement compiler passes across the Tungsten toolchain: mid-end optimization, backend code generation, instruction scheduling, register allocation, assembler, and linker.
• Co-design language constructs that improve expressiveness and performance for dataflow execution on wafer-scale hardware.
• Develop and iterate on code generation strategies for complex scientific and AI workloads, analyzing performance bottlenecks and closing the gap between peak and achieved throughput.
• Extend the compiler to support future hardware architectures as they move from design to silicon.
• Work directly with ASIC architects and application researchers to inform hardware-software co‑design decisions.

What We Are Looking For

• PhD in Computer Science or Computer Engineering preferred; exceptional candidates without a graduate degree who demonstrate equivalent depth through published research, significant open-source contributions, or a strong industry track record are encouraged to apply.
• Substantial experience in compiler development: IR design, optimization passes, code generation, or backend implementation for novel or non-standard architectures.
• Strong grasp of computer architecture: instruction sets, memory models, dataflow execution, and how hardware constraints shape compilation strategy.
• Systems-level programming ability in C; comfort reasoning about performance at the instruction and memory-access level.
• Ability to think about compilation as a design problem, not just an implementation task: you should have opinions about how language semantics, compiler IR, and hardware capabilities interact.
• Excellent communication and interpersonal skills: able to work effectively in a small, fast-moving team where compiler, architecture, and application concerns are deeply intertwined.

Valuable Assets

• Experience with compilers for spatial, dataflow, or CGRA architectures where the compilation model diverges significantly from conventional CPU/GPU targets.
• Exposure to ML compiler frameworks (MLIR, XLA, TVM) and understanding of how AI workloads map to hardware.
• Experience with multi-dimensional data representations, tiling strategies, and vectorized operations.
• Track record of published research or patents in compilers, programming languages, or architecture.
• Experience building runtime systems, debuggers, or architecture simulators, particularly for non-standard hardware.
• Understanding of parallel/distributed systems and cluster computing.

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.

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