2027 PhD ML System Engineering Intern/Co-op

Advanced Micro Devices, Inc.; Santa Clara (CA); On-site; USD 85,962,000 - 114,616,000; Full time

Job summary

AMD is seeking a highly motivated ML System Engineering co-op to join our team at Santa Clara/San Jose. You will work on taking an LLM or VLM and optimize its run time on the Ryzen AI NPU, starting with profiling and identifying bottlenecks.

You will learn how transformers map to tiled dataflow accelerators, pair with a mentor, and present findings to the engineering organization at term end. Requires pursuing a PhD in CS/CE/EE and strong Python/C++ skills.

Qualifications

• Must be pursuing a PhD in CS/CE/EE.
• Strong background in LLM/VLM architectures: attention, KV cache, prefill vs decode.
• Experience with compilers: graph lowering, operator fusion, scheduling, tiling, memory planning; MLIR a plus.

Responsibilities

• Own a project to optimize an LLM/VLM for Ryzen AI NPU by profiling time and memory.
• Write and tune AIE kernels with IRON to improve GEMM, attention, normalization and activation performance.
• Present results to the engineering org and document learnings for reuse.

Skills

Python

C++

Profiling

MLIR

AIE

Education

PhD in Computer Science/Computer Engineering/Electrical Engineering

Tools

IRON

AMD AI Engine (AIE)

MLIR

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou'redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger- technologythat moves the world forward.Join us and, together, we'll advance your career.

As an AMD intern and co-op, you'll be placed at the epicenter of the AI ecosystem, working alongside experts and industry pioneers. You'll do important work, learn new skills, expand your network, and gain real-world experience on projects that impact millions of end-users worldwide. Whether you're an undergrad or a PhD student, your contributions matter-and your experience here will be a launchpad for what comes next.

JOB DETAILS:

• Location: San Jose, CA or Santa Clara, CA
• Onsite: This role requires the student to work full time (40 hours a week), onsite work structure throughout the duration of the co-op/intern term

• Duration:

  • Spring/Summer Co-op: January 25, 2027 - August 13, 2027
  • Summer Internship:
  • Semester Students: May 24, 2027 - August 13, 2027
  • Quarter Students: June 21, 2027 - September 10, 2027
  • Summer/Fall Co-op:
  • Semester Students: May 24, 2027 - December 10, 2027
  • Quarter Students: June 21, 2027 - December 10, 2027

WHAT YOU WILL BE DOING:

We are seeking highly motivated ML System Engineering co-op to join our team. In this role -

• We will give you your own project: taking an LLM or VLM and making it run faster on the Ryzen AI NPU. You will start by studying where the time and memory actually go, then propose what to change.
• We will train you to write and tune AIE kernels with IRON, so you can optimize the operators that dominate LLM runtime - GEMM, attention, normalization, and activation functions.
• You get to present your findings to the wider engineering organization at the end of your term, and write up what you learned so the team can build on it.

What you will learn: how a transformer maps onto a tiled dataflow accelerator, how to reason about compute-bound versus memory-bound behavior on real hardware, and how production AI compilers and runtimes are structured. You will be paired with a mentor who reviews your work weekly.

WHO WE ARE LOOKING FOR:

• You are completing a PhD, in Computer Science, Computer Engineering, or Electrical Engineering.
• You know LLM and VLM architectures well - attention, KV cache, prefill versus decode, and vision encoder fusion.
• You have worked with compilers: graph lowering, operator fusion, scheduling, tiling, and memory planning. MLIR experience is a plus.
• You are strong in Python and C++, and comfortable profiling code to tell compute-bound from memory-bound behavior.
• Familiarity with the AMD AI Engine (AIE) architecture, or experience writing kernels or dataflow designs with IRON, is a plus.

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.