Senior Analog IC Design Engineer — High-Impact Startup

Siliconroad Semiconductor (SRS); Fatih; On-site; TRY 150,000 - 210,000; Full time

Job summary

Siliconroad Semiconductor is a fast-moving startup specializing in high-performance analog and mixed-signal IC design. You will design and simulate complex blocks, lead architectural decisions, and supervise layout to ensure top-quality silicon for global markets.

You will collaborate with a diverse team, document verification steps, and mentor junior engineers as the company scales. A strong background in CMOS processes and Cadence tools is essential for success.

Qualifications

• Bachelors, Masters, or PhD in Electrical Engineering or related field.
• Minimum 3 years of hands-on analog/mixed-signal IC design experience.
• Experience with deep sub-micron CMOS processes.
• Proficiency with industry-standard design and simulation tools (Cadence Virtuoso, Spectre).
• Strong fundamentals in analog design, device physics, noise and matching.
• Experience supervising IC layout and interpreting post-layout results.
• Excellent problem-solving, communication, and teamwork skills.

Responsibilities

• Design and simulate high-performance analog/mixed-signal blocks (ADC/DAC, amplifiers, LDOs, PLLs).
• Own design from architectural definition through layout supervision and post-layout verification.
• Create detailed design and verification documentation.
• Collaborate with layout, verification, and systems engineers to ensure robust delivery.
• Mentor junior engineers and participate in design reviews.
• Participate in evaluation and characterization of fabricated silicon in the lab.

Skills

Analog IC design

CMOS processes

Cadence Virtuoso

Spectre

Transistor-level design

Team collaboration

Problem-solving

Education

Electrical Engineering degree (Bachelors/Master's/PhD)

Tools

Cadence Virtuoso

Spectre

Job description

Siliconroad Semiconductor is a fast-moving startup specializing in high-performance analog and mixed-signal IC design. You will design and simulate complex blocks, lead architectural decisions, and supervise layout to ensure top-quality silicon for global markets.

You will collaborate with a diverse team, document verification steps, and mentor junior engineers as the company scales. A strong background in CMOS processes and Cadence tools is essential for success.