Staff Analog IC Design Engineer (ADC)

QUALCOMM GLOBAL TRADING PTE. LTD.; Singapore; On-site; SGD 120,000 - 190,000; Full time

Job summary

Qualcomm’s PMIC team seeks an experienced Analog IC Design Engineer to develop high-performance, low-power ADCs and precision analog circuits for mobile, XR, wearables and compute platforms.

You will drive architecture, design, verification, silicon bring-up, and production support of mixed-signal IP integrated into leading power management solutions. Collaborate with layout, digital, test and applications teams.

Qualifications

• MSEE or PhD with relevant analog/mixed-signal IC experience.
• Experience delivering ADCs or precision analog IP to silicon.

Responsibilities

• Define ADC and analog subsystem specifications and architectures.
• Design and verify ADCs and building blocks (comparators, amplifiers, references, DACs, oscillators, clocks).
• Perform transistor-level design and verification across PVT and Monte Carlo conditions.
• Develop behavioral models and support mixed-signal verification.
• Lead silicon bring-up, characterization, debug, and correlation to simulation.
• Mentor junior engineers and drive design reviews.

Skills

Analog IC design

Cadence Virtuoso

AMS simulations

Transistor-level design

Noise/mismatch analysis

Education

M.S.E.E. (Master of Science in Electrical Engineering)

Ph.D. in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

AMS simulators

Job description

Qualcomm's PMIC team is seeking an experienced Analog IC Design Engineer to develop high-performance, low-power ADCs and precision analog circuits for next-generation mobile, XR, wearable, and computing platforms.

As a senior technical contributor, you will drive architecture, design, verification, silicon bring-up, and production support of mixed-signal IP integrated into industry-leading power management solutions.

Responsibilities

• Define ADC and analog subsystem specifications and architectures.
• Design and verify ADCs and key analog building blocks, including comparators, amplifiers, references, DACs, oscillators, and clocking circuits.
• Perform transistor-level design and verification across PVT and Monte Carlo conditions.
• Develop behavioral models and support mixed-signal verification.
• Work closely with layout, digital, test, product, and applications teams.
• Lead silicon bring-up, characterization, debug, and correlation to simulation.
• Drive design reviews, technical innovation, and mentoring of junior engineers.

Minimum Qualifications

• MSEE with 8+ years or PhD with 5+ years of analog/mixed-signal IC design experience.
• Proven track record of delivering ADCs or precision analog IP to silicon.
• Strong knowledge of ADC architectures (SAR, Delta-Sigma, Pipeline, or Hybrid).
• Experience with transistor-level design, noise/mismatch analysis, and analog layout considerations.
• Proficiency with Cadence Virtuoso, Spectre, and AMS simulation tools.
• Strong communication and collaboration skills.

Preferred Qualifications

• PMIC, power management, battery management, or sensor-interface experience.
• Ultra-low-power design expertise.
• Experience with digital calibration techniques.
• Silicon validation and lab characterization experience.
• Technical leadership and mentoring experience.

Keywords: ADC, SAR ADC, Delta-Sigma ADC, Mixed-Signal IC,PMIC, Data Converter, Analog IC Design, Cadence, CMOS, BiCMOS, Silicon Validation.