Staff Analog IC Design Engineer (ADC)

Qualcomm; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Qualcomm Global Trading Pte. Ltd.

in Singapore is seeking a senior Analog IC Design Engineer to develop high-performance, low-power ADCs and precision analog circuits for mobile, XR, wearables, and computing platforms. You will drive architecture, design, verification, silicon bring-up, and production support of mixed-signal IP integrated into power management solutions, collaborating with layout, digital, test, product, and applications teams.

Qualifications

• MSEE with 8+ years or PhD with 5+ years of analog/mixed-signal IC design experience.
• Proven track record of delivering ADCs or precision analog IP to silicon.
• Strong knowledge of ADC architectures (SAR, Delta-Sigma, Pipeline, or Hybrid).

Responsibilities

• Define ADC and analog subsystem specifications and architectures.
• Design and verify ADCs and key analog building blocks, including comparators, amplifiers, references, DACs, oscillators, and clocking circuits.
• Perform transistor-level design and verification across PVT and Monte Carlo conditions.
• Develop behavioral models and support mixed-signal verification.
• Work closely with layout, digital, test, product, and applications teams.
• Lead silicon bring-up, characterization, debug, and correlation to simulation.
• Drive design reviews, technical innovation, and mentoring of junior engineers.

Skills

Analog IC design

Transistor-level design

Noise analysis

Education

MSEE

Master's degree

PhD

Tools

Cadence Virtuoso

Spectre

AMS simulation

Job description

Company

Qualcomm Global Trading Pte. Ltd.

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

Qualcomm's PMIC team is seeking an experienced Analog IC Design Engineer to develop high-performance, low-power ADCs and precision analog circuits for next-generation mobile, XR, wearable, and computing platforms.

As a senior technical contributor, you will drive architecture, design, verification, silicon bring-up, and production support of mixed-signal IP integrated into industry-leading power management solutions.

Responsibilities

• Define ADC and analog subsystem specifications and architectures.


• Design and verify ADCs and key analog building blocks, including comparators, amplifiers, references, DACs, oscillators, and clocking circuits.


• Perform transistor-level design and verification across PVT and Monte Carlo conditions.


• Develop behavioral models and support mixed-signal verification.


• Work closely with layout, digital, test, product, and applications teams.


• Lead silicon bring-up, characterization, debug, and correlation to simulation.


• Drive design reviews, technical innovation, and mentoring of junior engineers.

Minimum Qualifications

• MSEE with 8+ years or PhD with 5+ years of analog/mixed-signal IC design experience.


• Proven track record of delivering ADCs or precision analog IP to silicon.


• Strong knowledge of ADC architectures (SAR, Delta-Sigma, Pipeline, or Hybrid).


• Experience with transistor-level design, noise/mismatch analysis, and analog layout considerations.


• Proficiency with Cadence Virtuoso, Spectre, and AMS simulation tools.


• Strong communication and collaboration skills.

Preferred Qualifications

• PMIC, power management, battery management, or sensor-interface experience.


• Ultra-low-power design expertise.


• Experience with digital calibration techniques.


• Silicon validation and lab characterization experience.


• Technical leadership and mentoring experience.

Keywords: ADC, SAR ADC, Delta-Sigma ADC, Mixed-Signal IC, PMIC, Data Converter, Analog IC Design, Cadence, CMOS, BiCMOS, Silicon Validation.

Minimum Qualifications

Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Applicants

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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