THE PERSON:
A successful candidate will have solid software methodologies, software design expertise, deep HW/SW technical knowledge, and organizational skills. The candidate will interact across multiple teams to ensure on schedule defect‑free system software, push and accelerate AMD’s time to market. A candidate must possess technical proficiency and interpersonal confidence to represent design ideas to complex problems and innovative solutions with other developers as well as with non‑software focused silicon teams. Experience in a technical leadership role is preferred.
KEY RESPONSIBILITIES:
- Provide end‑to‑end technical global leadership and ownership of the quality, coverage, and completeness of Diagnostics solution for DCGPU programs.
- Highlights project goals, strategies, risks, and key requirements of Diagnostics, tools, and framework to facilitate PMs, Managers, IP Validation architects and Framework architects in test coverage requirements and planning.
- Owns the Diagnostics pre‑silicon emulation strategy and planning across SW based and FPGA‑based emulation models, including the RTL coverage requirements before silicon tape out, Diagnostics verification strategy and requirement before silicon back.
- Owns the SoC system level feature verification methodology and planning.
- Drive the technical requirements to achieve the feature coverage and hardware bug capture targets.
- Horizontal leadership and Collaboration with cross functional teams such as Platform Validation, SW ROCm, HW Architects and stakeholders to achieve key program milestones, such as bring up, all features enablement, performance profiling, production support etc., with desired coverage metrics from Diagnostics.
- Collaborate with the Product Engineering Organization and enable the product with high quality to our customers. Debug defects, improve yield, coverage and test time during NPI and volume production.
- Provide Diagnostics support to contract manufacturers and board engineering teams.
PREFERRED EXPERIENCE:
- Proven experience with IP and SoC verification, software development with the ability to closely interact with hardware designers
- Excellent understanding of processors based on SoC architecture, including processor, Compute GPU, System IO and Memory/HBM, Security block, to identify the critical areas for focus of SoC & IP verification
- Proficient in verifying complex IP blocks and system level functions/features for SoC by writing object oriented modern C++ programs. Experience developing machine learning, HPC or general‑purpose GPU compute applications a bonus.
- Strong mix of large‑scale software development ability and hardware understanding
- Knowledge and experience in developing applications on industry compute platforms such as ROCm, OpenCL, or CUDA an asset.
- Experienced with source controls systems like Perforce and GIT.
- Familiar with Linux, knowledge and experience of device driver or software development is preferred.
- Knowledge and experience with Manufacturing ATE/Wafer Sort Test and System Level Test a bonus.
- Strong system level debugging and testing skills, and capability to quickly identify problems and provide robust solutions
- Hands‑on experience with SoC bring up