Semicon Development Engineers (Die prep/chip attach/Mold)

People Profilers; Singapore; On-site; SGD 70,000 - 90,000; Full time

Job summary

A technology recruitment firm is seeking a Development Engineer in Singapore to support R&D activities focused on wafer-level packaging technologies. The role encompasses responsibility for process reliability, documentation, and cross-functional collaboration, requiring a Bachelor's degree and 3+ years of experience in semiconductor packaging. Competitive remuneration and comprehensive benefits are offered.

Benefits

Competitive remuneration package

Comprehensive range of benefits

Qualifications

• Minimum 3 years of hands-on experience in semiconductor packaging process development.
• Strong knowledge of DOE, FMEA, SPC, and failure analysis methodologies.
• Experience in OSAT, Foundry, or Advanced Packaging environments preferred.

Responsibilities

• Develop and optimize Chip-on-Wafer (CoW) processes.
• Perform material evaluations and reliability analyses.
• Collaborate cross-functionally for process integration.
• Prepare and maintain process documentation.

Skills

Chip-on-Wafer (CoW) processes

Die Preparation

Chip Attach

Molding processes

DOE

FMEA

SPC

Failure analysis

Data analysis

Cross-functional communication

Education

Bachelor’s degree in Materials, Electronics, Chemical, Mechanical Engineering

Tools

XRF

shear test

SAM

Job description

The Development Engineer will support R&D and process integration activities for 2.5D wafer-level packaging (WLP) technologies, focusing on Die Preparation, Chip Attach, and Molding processes.

The role ensures process reliability, manufacturability, and seamless integration for next-generation semiconductor packages used in AI, HPC, and memory applications.

Key Responsibilities

• Develop and optimize Chip-on-Wafer (CoW) processes.
• Chip Attach: Thermo-Compression Bonding (TCB), Laser Compression Bonding (LCB).
• Mold: compression or transfer molding for warpage control and chip protection.
• Perform material evaluations and reliability analyses (e.g., XRF, shear test, SAM).
• Design and execute DOE and FMEA to ensure robust process control and yield improvement.
• Collaborate cross-functionally with Bumping, RDL, and Failure Analysis teams for process integration.
• Monitor industry trends in equipment, materials, and 2.5D/3D packaging technologies.
• Support New Product Introduction (NPI) and yield ramp-up through structured problem-solving.
• Prepare and maintain process documentation, including flow charts, risk assessments, and engineering reports.
• Influence supplier qualification and capital equipment decisions related to 2.5D processes.
• Drive production readiness and contribute directly to yield, reliability, and revenue growth.

Requirements

• Bachelor’s degree or higher in Materials, Electronics, Chemical, Mechanical Engineering, or related field.
• Minimum 3 years of hands‑on experience in semiconductor packaging process development (Die Prep, Chip Attach, or Mold).
• Strong knowledge of DOE, FMEA, SPC, and failure analysis methodologies.
• Familiarity with analytical and reliability tools such as XRF, shear test, SAM.
• Excellent documentation, data analysis, and cross‑functional communication skills.
• Experience in OSAT, Foundry, or Advanced Packaging (2.5D/3D, HBM, Interposer) environments is preferred.

All Successful candidates can expect a very competitive remuneration package and a comprehensive range of benefits.

Please email your resume in a detailed MS Word format to *****@peopleprofilers.com stating
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