Research Scientist (AutoResearch on LLM)

Search Staffing Pte Ltd

Singapore

Presencial

SGD 140.000 - 220.000

Jornada completa

Hace 13 días

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Descripción de la vacante

Search Staffing Pte Ltd is seeking a Research Scientist to lead AutoResearch initiatives on LLMs, designing automated search and optimization frameworks to discover and train next-gen architectures. The role focuses on bridging hardware constraints with model design to improve pre-training efficiency and downstream performance.

You will collaborate with chip architects and researchers to push the boundaries of AutoML-driven AI, contribute to publications, and help scale experiments from

Formación

  • Master's or PhD degree in Computer Science, Electrical Engineering, Applied Mathematics, or a related quantitative field with a focus on Deep Learning
  • Strong research background in LLM pre-training, Transformer architectures, and scaling dynamics
  • Hands-on experience with AutoResearch, AutoML, automated optimization algorithms, or using AI agents/LLMs for automated scientific discovery
  • Solid understanding of GPU/accelerator architectures, memory hierarchies, parallel training strategies (tensor, pipeline, data parallel) and hardware performance profiling
  • Production grade coding skills in Python and deep learning frameworks (e.g. Pytorch, JAX, Megatron-LM, Deepspeed).
  • Demonstrated experience in training, scaling and evaluating large scaling models from scratch
  • Having first author publications in top tier machine learning or system conferences (e.g. NeurIPS, ICML, ICLR, ASPLOS, ISCA, MLSys) is preferred
  • Experience writing custom kernels (e.g. Triton, CUDA) or working with machine learning compilers are preferred
  • Direct experience working with silicon/chip design teams to customize model architectures for specific ASIC/GPU/FPGA constraints.
  • Experience building self improving AI Loops or automated coding research assistants

Responsabilidades

  • Design, build and scale automated search and optimization systems (Such as Neural Architecture Search, evolutionary algorithms, or LLM-driven research agents) to autonomously discover optimal LLM architectures
  • Analyze and integrate hardware level constraints (e.g. tensor parallel limits, memory bandwidths, latency, cache hierarchies, FLOPs, and energy efficiency of target silicon) into the optimization loop
  • Scale up discovered architectures to perform large-scale pre-training. Ensure the final models meet to exceed the performance, training efficiency, and convergence rate of existing top-tier foundation models
  • Develop accurate, cost effective proxy task, evaluation protocols, and scaling laws to predict full-scale LLM performance from early-stage automated search limits
  • Collaborate closely with chip architects, system/compiler engineers, and foundation model researchers to co-optimize hardware execution efficiency and model training algorithms
  • Stay at the forefront of AutoML, hardware-software co-design, and LLM pre-training literature, contributing to peer-reviewed publications and IP generation where applicable

Conocimientos

Deep Learning
LLM pre-training
Transformer architectures
AutoML
Python
GPU/accelerator architectures
Neural Architecture Search
Hardware-software co-design
Research collaboration

Educación

Master's or PhD in Computer Science/related quantitative field

Herramientas

PyTorch
JAX
Megatron-LM
Deepspeed
CUDA
Triton

Descripción del empleo

Research Scientist

As a Research Scientist (AutoResearch on LLM), you will focus on cutting edge AI-Driven AI development using Autoresearch(Automated Machine Learning) for Large Language Models (LLM). You will design and deploy automated research frameworks that autonomously discover. optimize, and train the next-generation LLM architectures. You will bridge the gap between hardware constraints and model design ensuring that the automatically optimized architectures achieve or exceed the pre-training efficiency and downstream performance of state of the art established base models

Key Responsibilities
  • Design, build and scale automated search and optimization systems (Such as Neural Architecture Search, evolutionary algorithms, or LLM-driven research agents) to autonomously discover optimal LLM architectures
  • Analyze and integrate hardware level constraints (e.g. tensor parallel limits, memory bandwidths, latency, cache hierarchies, FLOPs, and energy efficiency of target silicon) into the optimization loop
  • Scale up discovered architectures to perform large-scale pre-training. Ensure the final models meet to exceed the performance, training efficiency, and convergence rate of existing top-tier foundation models
  • Develop accurate, cost effective proxy task, evaluation protocols, and scaling laws to predict full-scale LLM performance from early-stage automated search limits
  • Collaborate closely with chip architects, system/compiler engineers, and foundation model researchers to co-optimize hardware execution efficiency and model training algorithms
  • Stay at the forefront of AutoML, hardware-software co-design, and LLM pre-training literature, contributing to peer-reviewed publications and IP generation where applicable
Qualifications & Requirements
  • Master's or PhD degree in Computer Science, Electrical Engineering, Applied Mathematics, or a related quantitative field with a focus on Deep Learning
  • Strong research background in LLM pre-training, Transformer architectures, and scaling dynamics
  • Hands‑on experience with AutoResearch, AutoML, automated optimization algorithms, or using AI agents/LLMs for automated scientific discovery
  • Solid understanding of GPU/accelerator architectures, memory hierarchies, parallel training strategies(tensor, pipeline, data parallel) and hardware performance profiling
  • Production grade coding skills in Python and deep learning frameworks (e.g. Pytorch, JAX, Megatron-LM, Deepspeed).
  • Demonstrated experience in training, scaling and evaluating large scaling models from scratch
  • Having first author publications in top tier machine learning or system conferences (e.g. NeurIPS, ICML, ICLR, ASPLOS, ISCA, MLSys) is preferred
  • Experience writing custom kernels (e.g. Triton, CUDA) or working with machine learning compilers are preferred
  • Direct experience working with silicon/chip design teams to customize model architectures for specific ASIC/GPU/FPGA constraints.
  • Experience building self improving AI Loops or automated coding research assistants
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