Principal Engineer / MTS, PDE Package Design

Micron; Singapore; On-site; SGD 180,000 - 240,000; Full time

Job summary

Micron Technology, Inc. in Singapore seeks an experienced packaging engineer to own architecture from feasibility to production. You will lead cross-functional reviews, balance trade-offs, and mentor engineers to deliver reliable, scalable solutions.

Strong Cadence and SiP layout skills are required, with AI-enabled tooling integrated into daily workflows. The role demands a Master’s degree in a relevant engineering field and 10+ years of experience in package design, with leadership

Qualifications

• Master's degree in Electrical, Mechanical or Materials Engineering.
• 10+ years of experience in package architecture and silicon-package co-design.
• Hands-on with package technologies, manufacturability, substrates and reliability.
• Ownership of complex package designs from feasibility to manufacturing handoff.
• Advanced proficiency with package-design tools and review workflows.
• Strong leadership and stakeholder communication across teams.
• Integrates AI-assisted tools to improve efficiency and quality.

Responsibilities

• Own package architecture from feasibility through tape-out and production readiness.
• Lead cross-functional reviews, trade-offs, and risk closure across product, silicon, assembly, supplier, and OSAT teams.
• Balance performance, reliability, manufacturability, cost, quality, and schedule; mentor engineers.
• Advance design rules, methodologies, automation, and tech roadmaps for future products.
• Represent packaging in silicon-board co-design, resolving cost and manufacturing trade-offs.
• Apply AI literacy to research, analysis, and problem solving within governance standards.

Skills

Package architecture

SiP layout & co-design

Tape-out & NPI

Cadence Allegro

Cross-functional leadership

AI literacy

Education

Master’s degree in Electrical/Mechanical/Materials Engineering

PhD candidates welcome

Tools

Cadence Allegro Package Designer / SiP Layout

Job description

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.

Responsibilities

• Own package architecture and execution from feasibility through tape‑out, qualification, and production readiness, ensuring design intent is translated into manufacturable, reliable, and scalable solutions.
• Serve as the technical authority for complex package issues, leading cross‑functional reviews, trade‑off decisions, and risk closure across product, silicon, technology, assembly, quality, supplier, and OSAT teams.
• Balance performance, reliability, manufacturability, cost, quality, and schedule to deliver production‑ready solutions while mentoring engineers through difficult technical decisions.
• Advance design rules, methodologies, automation workflows, and technology roadmaps for future products.
• Represent the packaging team in Silicon‑package‑board co‑design by integrating floorplan, interface, interconnect, power, signal, thermal, and mechanical requirements, and resolve cost and manufacturing trade‑offs to achieve a balanced package solution.
• Ability to apply baseline digital fluency and role‑appropriate AI literacy to use AI‑enabled tools responsibly and effectively for research, analysis, content creation, problem‑solving, operational tasks, and achieving business outcome.

Requirements

• Master’s degree in Electrical Engineering, Mechanical Engineering, Materials Engineering, or a related discipline; PhD candidates are welcome to apply.
• Minimum 10 years of relevant experience with deep expertise in package architecture and silicon‑package co‑design, including feasibility, stack‑up, I/O and interconnect planning, substrate layout, routing, power delivery, signal return paths, and design verification.
• Hands‑on experience with multiple relevant package technologies and strong knowledge of manufacturability, assembly processes, substrates, materials, reliability, and failure mechanisms.
• Proven ownership of complex package designs from feasibility and trade‑off studies through NPI tape‑out, qualification, and manufacturing handoff.
• Advanced proficiency with Cadence Allegro Package Designer / SiP Layout or equivalent package‑design tools, including design‑rule and review workflows.
• Strong technical leadership, mentoring, and stakeholder communication skills, with influence without direct authority; MTS candidates must demonstrate organization‑wide impact on roadmaps, standards, or investment decisions.
• Integrates AI‑assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.
• Contributes to a culture of continuous improvement by identifying, testing, and sharing AI‑enabled enhancements within one’s scope of work.

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high‑performance DRAM, NAND, and NOR memory and storage products through our Micron and Crucial brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities - from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact [e-mail]

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.