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IC layout engineer

ASTRAWAVE TECHNOLOGY PTE. LTD.

Singapore

On-site

SGD 45,000 - 65,000

Full time

Today
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Job summary

A technology company in Singapore is looking for experienced analog mixed signal layout and CAD designers to enhance high-speed/RF solutions. The role involves realizing layout designs, optimizing layouts together with circuit design engineers, and ensuring adherence to design rules. Ideal candidates will have a diploma or bachelor’s degree in electrical, computer, or electronics engineering. Fresh graduates with relevant qualifications are welcomed, emphasizing teamwork and commitment in a multi-cultural environment.

Qualifications

  • Fresh graduate with relevant diploma/degree in Microelectronics.
  • Good understanding of AMS layout fundamentals.
  • Ability to work closely with circuit design engineers.

Responsibilities

  • Realize layout design from schematic presentation.
  • Implement layout design including floor planning and device placement.
  • Ensure DRC rules are passed and perform necessary physical verification.

Skills

Layout design optimization
Power and Signal routing
Strong teamwork
Multi-cultural adaptability

Education

Diploma or bachelor's in electrical/computer/electronics engineering
Job description
Job Description

ASTRAWAVE develops chips for Data Processing, IP Licensing, Network, Bus, ChipletInterconnect as well as Chip Customization for different customers.

We are currently seeking experienced analog mixed signal layout and CAD designers to join our team in the development of high speed/RF solutions which will be used to complement our current products.

The Person

Work closely with circuit design engineers to optimize layout to meet specification.

Teamplayer and strong commitment to schedules. Able to work in a multi‑cultural environment.

Key Responsibilities

Realize layout design from schematic presentation.

Layout design implementation includes the following functions:

  • Floor planning and device placement
  • Power and Signal routings and Integrity optimization
  • DRC/LVS/ERC/ANT/ESD/PERC/LVL and necessary Physical Verification
  • Passing DRC rules and ensuring LVS
  • Preparing material and reviewing of layout
  • Checklist/Methodology to ensure quality of layout
  • Layout methodology and enhancement

Participate in post layout adjustments and block/IP activities.

Good Understanding of AMS layout fundamentals/EMIR/RC delay/DecouplingCaps/Latch-up.

Preferred Experience

Fresh graduate with relevant diploma/degree in Microelectronics.

Academic Credentials

Diploma or bachelor’s in electrical/computer/electronics engineering or equivalent.

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