IC Design Verification Engineer (12 months contract, Semiconductor)

JonDavidson Pte Ltd; Singapore; On-site; SGD 100,000 - 125,000; Full time

Job summary

A leading semiconductor MNC is seeking a talented individual for a 12-month contract role based in Singapore. The position involves working on Digital IP verification and SOC verification. Candidates should have a degree in Electronics Engineering and several years of relevant experience. This role offers a completion bonus, and the ideal candidate will possess strong analytical skills and the ability to adapt to new verification methodologies.

Benefits

1 month completion bonus

Qualifications

• 3-5 years of experience in semiconductor or high technology R&D environment.
• Experience in Digital verification with various skill sets.
• Able to work in a multi-cultural team.

Responsibilities

• Work on Digital IP verification or SOC verification.
• Verification planning including vplan writing.
• Schedule preparation and execution adherence.

Skills

Digital IP verification

Problem-solving

Analytical skills

Education

Degree or Masters in Electronics Engineering

Tools

VHDL

Verilog

UVM

System Verilog Assertions

JasperGOLD

Job description

Our client is one of the world's leading MNC in the Semiconductor industry. With increasing operational expansion in Asia Pacific, my client is now looking for a talented and strong person to fill this role. This is a contract position (12 months contract + 1 month completion bonus) based in Singapore.

The role works within the digital team in Singapore that includes all disciplines required for digital design and verification.

Responsibilities

• Work on Digital IP verification or SOC verification.
• Verification planning, this includes vplan writing, functional points identification and review.
• Implementation using different verification techniques (constraint random dynamics simulation and static formal verification).
• Verification closure by ensuring 100% coverage functionality are fully covered.
• Schedule preparation and execution adhere to plan.

Requirements

• Degree or Masters in Electronics' Engineering (a relevant experience with 3-5 years in a semiconductor or high technology R&D environment)
• Experience in Digital IP verification and good understanding of microcontroller architecture.
• Experience in Hardware Design Language (such as VHDL or Verilog)
• Experience in Digital verification with various skill sets:
  • Universal Verification Methodology (UVM)
  • System Verilog Assertions (SVA)
  • Formal Methodology (e.g JasperGOLD)
  • Coverage analysis
• Knowledge of System Verification with Cadence ® Perspec ™ will be an added advantage.
• Able to work in a multi-cultural team.
• Strong analytical and problem-solving skill.
• Able to keep up with fast moving new verification methodology.

Be careful - Don’t provide your bank or credit card details when applying for jobs. Don't transfer any money or complete suspicious online surveys. If you see something suspicious, report this job ad.