Design Verification Manager

OmniVision Technologies Singapore Pte. Ltd.; Singapore; On-site; SGD 100,000 - 140,000; Full time

Job summary

A leading company in semiconductor technology seeks a Design Verification Manager to lead a passionate team in developing advanced verification methodologies. The role demands extensive experience in SoC design principles and strong leadership skills, with a focus on achieving top-quality results in a fast-paced environment.

Qualifications

• 10+ years of relevant experience in verification.
• Strong knowledge in SoC design and verification.
• Highly disciplined and driven for excellence.

Responsibilities

• Lead and manage a verification team developing state-of-the-art methodologies.
• Conduct test plan reviews and ensure timely execution.
• Achieve zero-defect verification outcomes.

Skills

Leadership

Communication

UVM Verification

SoC Design Principles

Test Plan Development

C/C++

Python

Formal Verification

Education

MSEE/BSEE in Electrical Engineering or Computer Engineering

Tools

EDA Tools

Job description

About the job Design Verification Manager

Description

As a Design Verification Manager, you are expected to carry out the following responsibilities.

• Be in-charge of a passionate verification team that is constantly pushing the limits developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification.
• Conduct thorough test plan reviews systematically and execute the plan on-time with high quality.
• Achieve zero-defect with the best and smartest approach to the large verification space.

Requirements

• Strong knowledge of SoC design principles, including IP block integration and system-level verification
• Experience with test plan development, execution, and analysis
• Familiarity with EDA tools and development flows for ASIC verification
• Highly disciplined, quality-minded, and highly driven for excellence.
• Excellent team leader and good communication skills.
• Strong expertise in UVM verification methodology.
• Experience in C and/or a scripting language such as python or perl.
• MSEE/BSEE in Electrical Engineering or Computer Engineering, with at least 10 years of relevant experience.
• Experience in RTL design is a plus.
• Experience in video processing and video analytics is a plus.
• Passionate and strong in general programming is a plus.