AI-Assisted Foundation IP Development Intern

Ambiq Micro, Inc.

Singapore

On-site

SGD 17,000 - 28,000

Full time

14 days+

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Benefits offered by this job

Exposure to edge AI/IoT IP development

Job summary

Ambiq Micro, Inc. invites applications for an AI-Assisted Foundation IP Development Intern. The role focuses on standard cell and memory compiler IP for edge AI SoCs, using data analysis and ML to spot trends in characterization data and flag outliers early.

You will support circuit design, run characterization flows, and build predictive models to reduce simulation runs. This is an opportunity to contribute to low-power AI/IP initiatives at Ambiq.

Qualifications

  • Pursuing a BS in EE, CE, Microelectronics, or related field (rising Junior/Senior).
  • Working knowledge of Python and basic ML concepts (regression, clustering).
  • Comfort working with large datasets.
  • Basic understanding of circuit design and IC layout concepts (DRC/LVS).

Responsibilities

  • Support circuit design, spice/Monte Carlo simulation and layout of standard cells.
  • Perform layout tasks (placement, routing, DRC/LVS cleanup) for foundation IP.
  • Characterize standard cells (timing, power, noise) across PVT corners.
  • Run characterization flows using tools like Liberate.
  • Analyze characterization data using Python (pandas, scikit-learn) to find trends and outliers.
  • Build simple predictive models to flag likely failures and reduce simulation runs.
  • Help debug mismatches between simulated and characterized results.
  • Document findings and share with the IP team.

Skills

Python programming
ML concepts
Data analysis
Large datasets

Education

BS in EE/CE/Microelectronics or related field

Tools

Liberate
Tempus
Virtuoso
Calibre

Job description

AI-Assisted Foundation IP Development Intern

Company Overview

Ambiqis on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.

Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.

Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.

We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.

At Ambiq, we live by five values:Innovate. Collaborate. Focus. Learn. Achieve.

If that's you, join us — the intelligence everywhere revolution starts here.

AI-Assisted Foundation IP Development Intern
About the Role

Part of Foundation IP team on standard cell and memory compiler IP for edge AI SoCs — including using data analysis and ML to spot trends in characterization data and flag outliers early.

Responsibilities
  • Support circuit design, spice/Monte Carlo simulation and layout of standard cells
  • Perform layout tasks (placement, routing, DRC/LVS cleanup) for foundation IP
  • Characterize standard cells (timing, power, noise) across PVT corners
  • Run characterization flows using tools like Liberate
  • Analyze characterization data using Python (pandas, scikit-learn) to find trends and outliers
  • Build simple predictive models to flag likely failures and reduce simulation runs
  • Help debug mismatches between simulated and characterized results
  • Document findings and share with the IP team
Qualifications
  • Pursuing a BS in EE, CE, Microelectronics, or related field (rising Junior/Senior)
  • Basic understanding of circuit design and IC layout (DRC/LVS) concepts
  • Working knowledge of Python and basic ML concepts (regression, clustering)
  • Comfort working with large datasets
Nice to Have
  • Exposure to layout/schematic tools (Virtuoso, Calibre) or characterization tools (Liberate, Tempus)
  • A class project applying ML to engineering or scientific data
  • Interest in low-power IP for edge AI/IoT
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