Senior Digital IC Verification Engineer - RISC-V

Exciting opportunity to work on the latest cutting edge RISC-V technology in the semiconductor industry.

In this new role as a digital verification engineer, you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs, ARM & CPU architecture, PCIe protocols, and machine learning.

I am looking to speak with digital verification engineers with 5+ years of experience who have the following skills:

Required:

• Masters or PhD degree in Electronics / Microelectronics or a similar field
• 5+ years' experience in UVM environments & processes
• System Verilog for IP / SOC Verification of digital ICs / ASIC IP or chips
• Complex ASIC designs & architecture for advanced technology nodes
• Verification Metrics definition, Coverage analysis, and debugging skills
• Knowledge and experience in setting up an ASIC Verification environment, methodology, and flow
• vManager, vPlan and Regressions, etc.
• RISC-V / CPU / GPU (this is a bonus, not required)
• Knowledge of SOC verification is also a bonus
• Visa sponsorship can be offered if required (dependent on experience / qualifications)

Senior Engineer • Madrid, Community of Madrid