Senior SoC Verification Engineer — Private Medical Care

Synaptics; Katowice; On-site; PLN 253,000 - 339,000; Full time

Job summary

A technology company in Poland is seeking a Senior Verification Engineer to join their SoC Verification team. The role focuses on developing System Verilog UVM testbenches and end-to-end ownership of complex SoCs and IPs verification. Candidates should have 5+ years of experience, strong proficiency in System Verilog and UVM, and excellent communication skills. The position offers competitive benefits including private medical care and costs related to sports activities and language classes.

Benefits

Sharing the costs of sports activities

Private medical care

Sharing the costs of foreign language classes

Qualifications

• 5+ years of experience in SoC verification.
• Strong proficiency in System Verilog and UVM.
• Good understanding of assertion-based verification methodologies.

Responsibilities

• Develop System Verilog UVM testbenches.
• Define and implement a functional coverage model.
• Contribute to the verification strategy and architecture of SoC testbenches.

Skills

System Verilog

UVM

Simulation & debugging tools

Scripting languages (Python, Perl, Tcl)

Versioning tools (GIT)

C / C++ (for embedded CPU verification)

Problem-solving skills

Communication skills

Team collaboration

Education

Bachelor's degree in Computer Science, Engineering or related field

Tools

Jenkins

Questa/VCS

Verdi

Job description

A technology company in Poland is seeking a Senior Verification Engineer to join their SoC Verification team. The role focuses on developing System Verilog UVM testbenches and end-to-end ownership of complex SoCs and IPs verification. Candidates should have 5+ years of experience, strong proficiency in System Verilog and UVM, and excellent communication skills. The position offers competitive benefits including private medical care and costs related to sports activities and language classes.