Principal Verification Engineer

Blue Origin; Polska; On-site; PLN 587,000 - 821,000; Full time

Job summary

Blue Origin is seeking a Principal Verification Engineer to lead chip and subsystem verification for its ASIC & Networking teams. You will own verification strategy, test plans, and coverage goals across IP, subsystems, and SoC, working with global teams and state‑of‑the‑art AI‑assisted toolchains.

The role demands a decade of ASIC/SoC verification experience, SystemVerilog/UVM expertise, and leadership on at least one taped-out project. Willingness to travel up to 10% is required.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or related field.
• Minimum ten years of ASIC/SoC functional verification experience.
• Hands-on SystemVerilog and UVM testbench development with metric-driven verification.
• Experience as verification technical lead on at least one taped-out silicon program.
• Willingness to travel up to 10 percent to other team locations.

Responsibilities

• Lead verification for chip level and complex subsystems through sign-off, collaborating with global engineering teams.
• Own verification strategy, test plans, and measurable coverage goals across assigned subsystems and SoC.
• Identify verification gaps, propose methodology changes, and implement them across the verification organization.
• Serve as subject area expert, setting technical direction and resolving escalated verification problems.
• Architect reusable verification environments, reference models, and infrastructure spanning IP, subsystem, and SoC levels.
• Drive regression health, coverage closure, and sign-off readiness across simulation and formal results.
• Review testbench architecture and debug approaches, and mentor engineers in verification methodology.
• Partner with design, architecture, and modeling teams to align verification with program milestones.

Skills

SystemVerilog

UVM

ASIC verification

Formal verification

Testbench development

Leadership

Education

Bachelor's degree in Electrical/Computer Engineering

Tools

Simulation tools

Job description

Application close date: Applications will be accepted on an ongoing basis until the requisition is closed.

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! Blue Origin is pioneering the future of space-based connectivity with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This network will service tens of thousands of enterprise, data center, and government users who require reliable connectivity for critical operations.

As a Principal Verification Engineer on the ASIC & Networking team, you will support TeraWave's first in-house silicon program, which comprises a high-throughput modem and a DSP‑intensive digital beamformer with first tapeout targeted for 2027. Verification strategy, methodology, and infrastructure are being defined now, and you will help define them. The work spans IP, subsystem, and full SoC verification, including CPU subsystems, performance‑critical interconnects, security, high‑speed peripherals, modem datapath and PHY layers, DSP and beamforming compute, and mixed‑signal interfaces. You will own a subset of this scope aligned to your background. The team treats constrained‑random simulation, formal methods, and processor‑driven SoC testing as equal first‑class tools, and is building an AI‑enabled verification platform that includes LLM‑assisted stimulus and testbench generation, automated regression triage and failure clustering, and data‑driven coverage closure. Because none of this is inherited, the engineers who build these capabilities will own them - and grow with the program as it scales.

Background in wireless communications, modem, baseband, and DSP verification is welcome but not required. Architects and modeling engineers support your ramp, and verification judgment and system‑level thinking are weighted above domain background.

Key Responsibilities

• Lead verification for chip level and complex subsystems through sign‑off, collaborating with global engineering teams.
• Own verification strategy, test plans, and measurable coverage goals across assigned subsystems and SoC.
• Identify verification gaps, propose methodology changes, and implement them across the verification organization.
• Serve as subject area expert, setting technical direction and resolving escalated verification problems.
• Architect reusable verification environments, reference models, and infrastructure spanning IP, subsystem, and SoC levels.
• Drive regression health, coverage closure, and sign‑off readiness across simulation and formal results.
• Review testbench architecture and debug approaches, and mentor engineers in verification methodology.
• Partner with design, architecture, and modeling teams to align verification with program milestones.

Basic Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, or equivalent experience.
• Minimum ten years of professional experience in ASIC or SoC functional verification.
• Hands‑on expertise in SystemVerilog and UVM testbench development, plus metric driven verification.
• Experience as verification technical lead on at least one taped‑out silicon program.
• Willingness to travel up to 10 percent to other team locations.

Preferred Qualifications

• Recognized depth in at least one verification specialty applied on production silicon programs.
• Formal verification experience on production silicon, including connectivity, register maps, arbitration, CDC, or security properties.
• Gate level simulation experience, including timing aware and post‑layout runs and debug.
• Verification background in wireless or wired communication systems, including modem, baseband, PHY, or DSP hardware.
• Experience verifying LDPC, FEC, framing, or beamforming logic using bit‑accurate reference models and fixed‑point analysis.
• Experience developing C based or portable stimulus for SoC, CPU boot, and firmware driven scenarios.
• Experience applying AI, ML, or LLM tooling to stimulus generation, regression triage, or coverage analysis.

Culture Statement

Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles. Candidates may be subject to verification and BGS screening as per applicable law. We’re committed to building the road to space so our children can build the future. We are a mission‑driven company focused on ideas and innovation, and encourage fresh perspectives from bold voices. At Blue, our team is building the future as their unique selves. Thank you for your interest in working at Blue Origin!

Blue Origin was founded with a vision to enable a future where millions of people are living and working in space to benefit Earth. In order to preserve Earth, Blue Origin believes in the need to enable humanity to expand, explore, find new energy and material resources, and move industries that stress Earth into space. Blue Origin believes it has an important role in building a road to space and lowering the cost of getting there. At Blue Origin, we’re working on this today by developing fully reusable launch vehicles and systems that are safe, reliable and affordable. Every launch vehicle is designed for human spaceflight from the beginning and able to ferry payloads to space.