Senior Digital Design

Analog Devices, Inc. (ADI); Philippines; On-site; PHP 600,000 - 900,000; Full time

Benefits offered by this job

Continuous learning programs

Job summary

Analog Devices, Inc. in the Philippines seeks a Digital Design Engineer to contribute to RTL design, verification, and mixed-signal integration. You will work under a cross-disciplinary JDT and collaborate with DV and physical design teams to advance high-speed and precision digital blocks.

The role involves developing verification skills, staying current with UVM methods, and supporting timing and synthesis tasks in a fast-paced environment.

Qualifications

• BS or MS in ECE, EE, or CpE or equivalent.
• 2–5 years digital design experience or strong NCG background.
• Proficiency in SystemVerilog/Verilog; UVM preferred.
• Experience with scripting languages (Python/Perl/TCL).

Responsibilities

• Write RTL for digital blocks based on specifications.
• Perform lint, CDC analysis, and support DFT integration.
• Assist in writing functional testcases and simple UVM components.
• Collaborate with DV engineers for coverage closure and bug resolution.
• Support AMS co-simulation and integration with analog blocks.
• Work with physical design teams on synthesis and timing.
• Train and develop skills in digital design verification.

Skills

SystemVerilog/Verilog

UVM

Python/Perl/TCL scripting

AMS modeling knowledge

Digital design experience

Education

BS or MS in ECE/EE/CpE

Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

Digital Design Engineer

The Joint Development Team (JDT) is a small, independent, cross-disciplinary group whose charter is to accelerate the development of key components, systems, algorithms, and techniques necessary to advance the state of the art in targeted areas and to collaborate with focused product development teams to get these advances to the marketplace. Current and future research areas include advanced medical devices, energy metering and fault detection, high-speed imaging, security electronics, ultra-precision references and data converters. The group is led by Analog Devices Fellow JED Hurwitz, a pioneer in CMOS imaging, recognized expert in ultra-high precision, and of broad industrial experience. The team members must be comfortable working on a wide variety of products and technologies in a fast-paced and agile environment and will be exposed to various groups across the corporation’s many sites through all stages of the development cycle. The role contributes to RTL design, subsystem implementation, and mixed-signal integration of digital logic blocks under the mentorship of senior designers. Work spans RTL creation, verification collaboration, and supporting implementation flows. The engineer is expected to develop skills related to digital verification. The engineer may switch between design and DV roles depending on project needs once sufficiently trained.

Key Responsibilities

• Write RTL for digital blocks based on specifications.
• Perform lint, CDC analysis, and support DFT integration.
• Assist in writing functional testcases and simple UVM components.
• Collaborate with DV engineers for coverage closure and bug resolution.
• Support AMS co-simulation and integration with analog blocks.
• Work with physical design teams on synthesis and timing.
• Train and develop skills in digital design verification.

Minimum Qualifications

• BS or MS in ECE, EE, CpE, or equivalent.
• 2-5 years digital design experience, or strong NCG background.
• Proficiency in SystemVerilog/Verilog; familiarity with UVM preferred.
• Experience with scripting languages (Python/Perl/TCL).
• Basic understanding of AMS modeling and mixed-signal flows is a plus.
• Strong analytical, problem-solving, and communication skills.
• Capable of performing independent research and self study.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Come join ADI – a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare. ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future.